You write custom CUDA kernels to replace the pytorch operators in the given architecture to get speedups. 

    You have complete freedom to choose the set of operators you want to replace. You may make the decision to replace some operators with custom CUDA kernels and leave others unchanged. You may replace multiple operators with custom implementations, consider operator fusion opportunities (combining multiple operators into a single kernel, for example, combining matmul+relu), or algorithmic changes (such as online softmax). You are only limited by your imagination.


        Here's an example to show you the syntax of inline embedding custom CUDA operators in torch: The example given architecture is: 

        ``` 

        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F


class Model(nn.Module):
    def __init__(self) -> None:
        super().__init__()

    def forward(self, a, b):
        return a + b


def get_inputs():
    # randomly generate input tensors based on the model architecture
    a = torch.randn(1, 128).cuda()
    b = torch.randn(1, 128).cuda()
    return [a, b]


def get_init_inputs():
    # randomly generate tensors required for initialization based on the model architecture
    return []

        ``` 

        The example new arch with custom CUDA kernels looks like this:
        ```
        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Define the custom CUDA kernel for element-wise addition
elementwise_add_source = """
#include <torch/extension.h>
#include <cuda_runtime.h>

__global__ void elementwise_add_kernel(const float* a, const float* b, float* out, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        out[idx] = a[idx] + b[idx];
    }
}

torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b) {
    auto size = a.numel();
    auto out = torch::zeros_like(a);

    const int block_size = 256;
    const int num_blocks = (size + block_size - 1) / block_size;

    elementwise_add_kernel<<<num_blocks, block_size>>>(a.data_ptr<float>(), b.data_ptr<float>(), out.data_ptr<float>(), size);

    return out;
}
"""

elementwise_add_cpp_source = (
    "torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b);"
)

# Compile the inline CUDA code for element-wise addition
elementwise_add = load_inline(
    name="elementwise_add",
    cpp_sources=elementwise_add_cpp_source,
    cuda_sources=elementwise_add_source,
    functions=["elementwise_add_cuda"],
    verbose=True,
    extra_cflags=[""],
    extra_ldflags=[""],
)


class ModelNew(nn.Module):
    def __init__(self) -> None:
        super().__init__()
        self.elementwise_add = elementwise_add

    def forward(self, a, b):
        return self.elementwise_add.elementwise_add_cuda(a, b)

        ``` 

        
    You are given the following architecture: 

    ```
    # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    A model that computes Hinge Loss for binary classification tasks.

    Parameters:
        None
    """
    def __init__(self):
        super(Model, self).__init__()

    def forward(self, predictions, targets):
        """
        Computes mean hinge loss.

        Args:
            predictions (torch.Tensor): Predictions tensor of shape (batch_size, num_classes), float32.
            targets (torch.Tensor): Targets tensor of shape (batch_size,), float32.

        Returns:
            torch.Tensor: Scalar mean hinge loss.
        """
        return torch.mean(torch.clamp(1 - predictions * targets, min=0))
    ```
    
Optimize the architecture named Model with custom CUDA operators! Name your optimized output architecture ModelNew. Output the new code in codeblocks. Please generate real code, NOT pseudocode, make sure the code compiles and is fully functional. Just output the new model code, no other text, and NO testing code! 



This is turn 3 of 6 for this task. Your previous solution (turn 2) was:
```python
import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline


_cpp_source = r"""
#include <torch/extension.h>
torch::Tensor hinge_loss_cuda(torch::Tensor predictions, torch::Tensor targets);
"""

_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/ExpandUtils.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <algorithm>
#include <cstdint>
#include <limits>

struct BroadcastInfo {
    int ndim;
    int64_t sizes[64];
    int64_t ps[64];
    int64_t ts[64];
};

__device__ __forceinline__ float hinge(float p, float t) {
    float v = __fsub_rn(1.0f, __fmul_rn(p, t));
    return v < 0.0f ? 0.0f : v;
}

__device__ __forceinline__ float block_sum(float v) {
    __shared__ float scratch[8];
    const int lane = threadIdx.x & 31;
    const int warp = threadIdx.x >> 5;

    #pragma unroll
    for (int offset = 16; offset; offset >>= 1)
        v += __shfl_down_sync(0xffffffff, v, offset);

    if (lane == 0)
        scratch[warp] = v;
    __syncthreads();

    v = threadIdx.x < 8 ? scratch[lane] : 0.0f;
    if (warp == 0) {
        #pragma unroll
        for (int offset = 16; offset; offset >>= 1)
            v += __shfl_down_sync(0xffffffff, v, offset);
    }
    return v;
}

__device__ __forceinline__ void store_sum(
    float sum, float* out, int64_t n
) {
    sum = block_sum(sum);
    if (threadIdx.x == 0) {
        out[blockIdx.x] = gridDim.x == 1
            ? (n ? sum / static_cast<float>(n) : nanf(""))
            : sum;
    }
}

// Reuse four column values across eight rows. No per-element
// broadcast-coordinate calculation or expanded tensor is needed.
__global__ void outer_hinge_kernel(
    const float* __restrict__ rows,
    const float* __restrict__ cols,
    float* __restrict__ out,
    int64_t m,
    int64_t n,
    int64_t row_stride,
    int64_t col_stride,
    int64_t column_tiles,
    int64_t tile_count
) {
    float s0 = 0.0f;
    float s1 = 0.0f;
    float s2 = 0.0f;
    float s3 = 0.0f;

    for (int64_t tile = blockIdx.x; tile < tile_count; tile += gridDim.x) {
        const int64_t row_base = (tile / column_tiles) * 8;
        const int64_t col_base = (tile % column_tiles) * 1024;
        const int64_t c0 = col_base + threadIdx.x;
        const int64_t c1 = c0 + 256;
        const int64_t c2 = c0 + 512;
        const int64_t c3 = c0 + 768;

        const float t0 = c0 < n ? cols[c0 * col_stride] : 0.0f;
        const float t1 = c1 < n ? cols[c1 * col_stride] : 0.0f;
        const float t2 = c2 < n ? cols[c2 * col_stride] : 0.0f;
        const float t3 = c3 < n ? cols[c3 * col_stride] : 0.0f;

        #pragma unroll
        for (int r = 0; r < 8; ++r) {
            if (row_base + r < m) {
                const float p = rows[(row_base + r) * row_stride];
                if (c0 < n) s0 += hinge(p, t0);
                if (c1 < n) s1 += hinge(p, t1);
                if (c2 < n) s2 += hinge(p, t2);
                if (c3 < n) s3 += hinge(p, t3);
            }
        }
    }
    store_sum((s0 + s1) + (s2 + s3), out, m * n);
}

template<bool PScalar, bool TScalar>
__global__ void contiguous_hinge_kernel(
    const float* __restrict__ p,
    const float* __restrict__ t,
    float* __restrict__ out,
    int64_t n
) {
    float sums[4] = {0.0f, 0.0f, 0.0f, 0.0f};
    const int64_t step = static_cast<int64_t>(gridDim.x) * 1024;

    for (int64_t base = static_cast<int64_t>(blockIdx.x) * 1024
                        + threadIdx.x;
         base < n; base += step) {
        #pragma unroll
        for (int j = 0; j < 4; ++j) {
            const int64_t i = base + j * 256;
            if (i < n)
                sums[j] += hinge(p[PScalar ? 0 : i], t[TScalar ? 0 : i]);
        }
    }
    store_sum((sums[0] + sums[1]) + (sums[2] + sums[3]), out, n);
}

template<typename index_t>
__global__ void broadcast_hinge_kernel(
    const float* __restrict__ p,
    const float* __restrict__ t,
    float* __restrict__ out,
    int64_t n,
    BroadcastInfo info
) {
    float sum = 0.0f;
    const int64_t step = static_cast<int64_t>(blockDim.x) * gridDim.x;

    for (int64_t i = static_cast<int64_t>(blockIdx.x) * blockDim.x
                     + threadIdx.x;
         i < n; i += step) {
        index_t remaining = static_cast<index_t>(i);
        int64_t po = 0;
        int64_t to = 0;

        for (int d = info.ndim - 1; d >= 0; --d) {
            const index_t size = static_cast<index_t>(info.sizes[d]);
            const index_t coord = remaining % size;
            remaining /= size;
            po += static_cast<int64_t>(coord) * info.ps[d];
            to += static_cast<int64_t>(coord) * info.ts[d];
        }
        sum += hinge(p[po], t[to]);
    }
    store_sum(sum, out, n);
}

__global__ void finish_kernel(
    const float* __restrict__ partials,
    float* __restrict__ out,
    int count,
    int64_t n
) {
    float sum = 0.0f;
    for (int i = threadIdx.x; i < count; i += 256)
        sum += partials[i];
    sum = block_sum(sum);
    if (threadIdx.x == 0)
        out[0] = sum / static_cast<float>(n);
}

torch::Tensor hinge_loss_cuda(torch::Tensor predictions, torch::Tensor targets) {
    TORCH_CHECK(predictions.is_cuda() && targets.is_cuda(),
                "Inputs must be CUDA tensors");
    TORCH_CHECK(predictions.device() == targets.device(),
                "Inputs must be on the same device");
    TORCH_CHECK(predictions.scalar_type() == at::kFloat &&
                targets.scalar_type() == at::kFloat,
                "Inputs must have dtype float32");

    const c10::cuda::CUDAGuard guard(predictions.device());
    auto expanded = at::broadcast_tensors({predictions, targets});
    const auto& p = expanded[0];
    const auto& t = expanded[1];
    TORCH_CHECK(p.dim() <= 64, "At most 64 dimensions are supported");

    const int64_t count = p.numel();
    BroadcastInfo info{};
    // Remove singleton dimensions and merge compatible adjacent dimensions.
    for (int d = 0; d < p.dim(); ++d) {
        if (p.size(d) == 1)
            continue;
        const int k = info.ndim - 1;
        if (k >= 0 &&
            info.ps[k] == p.stride(d) * p.size(d) &&
            info.ts[k] == t.stride(d) * p.size(d)) {
            info.sizes[k] *= p.size(d);
            info.ps[k] = p.stride(d);
            info.ts[k] = t.stride(d);
        } else {
            const int j = info.ndim++;
            info.sizes[j] = p.size(d);
            info.ps[j] = p.stride(d);
            info.ts[j] = t.stride(d);
        }
    }

    const bool pscalar = predictions.numel() == 1;
    const bool tscalar = targets.numel() == 1;
    const bool linear = (p.is_contiguous() || pscalar) &&
                        (t.is_contiguous() || tscalar);
    const bool outer_pt = info.ndim == 2 &&
                          info.ps[1] == 0 && info.ts[0] == 0;
    const bool outer_tp = info.ndim == 2 &&
                          info.ts[1] == 0 && info.ps[0] == 0;
    const bool outer = count > 0 && (outer_pt || outer_tp);

    int64_t tiles = 0;
    int64_t column_tiles = 0;
    int blocks;
    if (outer) {
        column_tiles = (info.sizes[1] + 1023) / 1024;
        tiles = ((info.sizes[0] + 7) / 8) * column_tiles;
        blocks = static_cast<int>(std::min<int64_t>(4096, tiles));
    } else {
        blocks = static_cast<int>(std::max<int64_t>(
            1, std::min<int64_t>(4096, (count + 1023) / 1024)));
    }

    auto output = torch::empty({}, predictions.options());
    auto partials = blocks == 1
        ? output
        : torch::empty({blocks}, predictions.options());
    const cudaStream_t stream = at::cuda::getCurrentCUDAStream();
    const float* pp = p.data_ptr<float>();
    const float* tp = t.data_ptr<float>();
    float* dst = partials.data_ptr<float>();

    if (outer) {
        outer_hinge_kernel<<<blocks, 256, 0, stream>>>(
            outer_pt ? pp : tp,
            outer_pt ? tp : pp,
            dst,
            info.sizes[0], info.sizes[1],
            outer_pt ? info.ps[0] : info.ts[0],
            outer_pt ? info.ts[1] : info.ps[1],
            column_tiles, tiles);
    } else if (linear || count == 0) {
        if (pscalar && tscalar) {
            contiguous_hinge_kernel<true, true><<<blocks, 256, 0, stream>>>(
                pp, tp, dst, count);
        } else if (pscalar) {
            contiguous_hinge_kernel<true, false><<<blocks, 256, 0, stream>>>(
                pp, tp, dst, count);
        } else if (tscalar) {
            contiguous_hinge_kernel<false, true><<<blocks, 256, 0, stream>>>(
                pp, tp, dst, count);
        } else {
            contiguous_hinge_kernel<false, false><<<blocks, 256, 0, stream>>>(
                pp, tp, dst, count);
        }
    } else if (count <= std::numeric_limits<int32_t>::max()) {
        broadcast_hinge_kernel<int32_t><<<blocks, 256, 0, stream>>>(
            pp, tp, dst, count, info);
    } else {
        broadcast_hinge_kernel<int64_t><<<blocks, 256, 0, stream>>>(
            pp, tp, dst, count, info);
    }
    C10_CUDA_KERNEL_LAUNCH_CHECK();

    if (blocks > 1) {
        finish_kernel<<<1, 256, 0, stream>>>(
            dst, output.data_ptr<float>(), blocks, count);
        C10_CUDA_KERNEL_LAUNCH_CHECK();
    }
    return output;
}
"""

_hinge_extension = load_inline(
    name="tiled_fused_hinge_loss_v2",
    cpp_sources=_cpp_source,
    cuda_sources=_cuda_source,
    functions=["hinge_loss_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3", "--fmad=false"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(self):
        super().__init__()

    def forward(self, predictions, targets):
        return _hinge_extension.hinge_loss_cuda(predictions, targets)
```
Result of evaluating it:
The solution is correct on the test inputs. Mean runtime 7.97 ms; the PyTorch reference (with TF32 enabled) takes 21.7 ms; speedup 2.723x.
Profiler, top device kernels of one forward pass of your solution:
| device kernel | total device time (us) | calls |
|---|---|---|
| void broadcast_hinge_kernel<int>(float const*, float const*, float*, long, BroadcastInfo) | 7940.7 | 1 |
| finish_kernel(float const*, float*, int, long) | 3.2 | 1 |

Write an improved complete ModelNew: fix any error, and if the solution is already correct, make it faster. Output the new code in one ```python codeblock. Just the model code, no other text, and NO testing code.
