You write custom CUDA kernels to replace the pytorch operators in the given architecture to get speedups. 

    You have complete freedom to choose the set of operators you want to replace. You may make the decision to replace some operators with custom CUDA kernels and leave others unchanged. You may replace multiple operators with custom implementations, consider operator fusion opportunities (combining multiple operators into a single kernel, for example, combining matmul+relu), or algorithmic changes (such as online softmax). You are only limited by your imagination.


        Here's an example to show you the syntax of inline embedding custom CUDA operators in torch: The example given architecture is: 

        ``` 

        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F


class Model(nn.Module):
    def __init__(self) -> None:
        super().__init__()

    def forward(self, a, b):
        return a + b


def get_inputs():
    # randomly generate input tensors based on the model architecture
    a = torch.randn(1, 128).cuda()
    b = torch.randn(1, 128).cuda()
    return [a, b]


def get_init_inputs():
    # randomly generate tensors required for initialization based on the model architecture
    return []

        ``` 

        The example new arch with custom CUDA kernels looks like this:
        ```
        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Define the custom CUDA kernel for element-wise addition
elementwise_add_source = """
#include <torch/extension.h>
#include <cuda_runtime.h>

__global__ void elementwise_add_kernel(const float* a, const float* b, float* out, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        out[idx] = a[idx] + b[idx];
    }
}

torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b) {
    auto size = a.numel();
    auto out = torch::zeros_like(a);

    const int block_size = 256;
    const int num_blocks = (size + block_size - 1) / block_size;

    elementwise_add_kernel<<<num_blocks, block_size>>>(a.data_ptr<float>(), b.data_ptr<float>(), out.data_ptr<float>(), size);

    return out;
}
"""

elementwise_add_cpp_source = (
    "torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b);"
)

# Compile the inline CUDA code for element-wise addition
elementwise_add = load_inline(
    name="elementwise_add",
    cpp_sources=elementwise_add_cpp_source,
    cuda_sources=elementwise_add_source,
    functions=["elementwise_add_cuda"],
    verbose=True,
    extra_cflags=[""],
    extra_ldflags=[""],
)


class ModelNew(nn.Module):
    def __init__(self) -> None:
        super().__init__()
        self.elementwise_add = elementwise_add

    def forward(self, a, b):
        return self.elementwise_add.elementwise_add_cuda(a, b)

        ``` 

        
    You are given the following architecture: 

    ```
    # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a matrix-scalar multiplication (C = A * s)
    """
    def __init__(self):
        super(Model, self).__init__()
    
    def forward(self, A: torch.Tensor, s: float) -> torch.Tensor:
        """
        Performs matrix-scalar multiplication.

        Args:
            A: Input matrix of shape (M, N)
            s: Scalar value

        Returns:
            C: Resulting matrix of shape (M, N)
        """
        return A * s

M = 16384 * 4
N = 4096 * 4

def get_inputs():
    A = torch.rand(M, N)
    s = 3.14
    return [A, s]

def get_init_inputs():
    return []  # No special initialization inputs needed
    ```
    
Optimize the architecture named Model with custom CUDA operators! Name your optimized output architecture ModelNew. Output the new code in codeblocks. Please generate real code, NOT pseudocode, make sure the code compiles and is fully functional. Just output the new model code, no other text, and NO testing code! 



This is turn 3 of 6 for this task. Your previous solution (turn 2) was:
```python
import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline


_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAStream.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <algorithm>
#include <cstdint>

__device__ __forceinline__ float4 load_streaming(const float4* p) {
    float4 v;
    asm volatile(
        "ld.global.cs.v4.f32 {%0, %1, %2, %3}, [%4];"
        : "=f"(v.x), "=f"(v.y), "=f"(v.z), "=f"(v.w)
        : "l"(p)
        : "memory");
    return v;
}

__device__ __forceinline__ void store_streaming(
    float4* p, float4 v, float scalar)
{
    v.x *= scalar;
    v.y *= scalar;
    v.z *= scalar;
    v.w *= scalar;
    asm volatile(
        "st.global.cs.v4.f32 [%0], {%1, %2, %3, %4};"
        :
        : "l"(p), "f"(v.x), "f"(v.y), "f"(v.z), "f"(v.w)
        : "memory");
}

template<int THREADS>
__global__ void scalar_mul_streaming(
    const float* __restrict__ input,
    float* __restrict__ output,
    float scalar,
    int64_t count)
{
    const float4* src = reinterpret_cast<const float4*>(input);
    float4* dst = reinterpret_cast<float4*>(output);
    const int64_t vectors = count / 4;
    const int64_t step = static_cast<int64_t>(gridDim.x) * THREADS * 4;
    int64_t i = static_cast<int64_t>(blockIdx.x) * THREADS * 4
                + threadIdx.x;

    for (; i + 3 * THREADS < vectors; i += step) {
        float4 a = load_streaming(src + i);
        float4 b = load_streaming(src + i + THREADS);
        float4 c = load_streaming(src + i + 2 * THREADS);
        float4 d = load_streaming(src + i + 3 * THREADS);

        store_streaming(dst + i, a, scalar);
        store_streaming(dst + i + THREADS, b, scalar);
        store_streaming(dst + i + 2 * THREADS, c, scalar);
        store_streaming(dst + i + 3 * THREADS, d, scalar);
    }

    #pragma unroll
    for (int j = 0; j < 4; ++j) {
        const int64_t k = i + j * THREADS;
        if (k < vectors) {
            store_streaming(dst + k, load_streaming(src + k), scalar);
        }
    }

    if (blockIdx.x == 0 && threadIdx.x < count % 4) {
        const int64_t k = vectors * 4 + threadIdx.x;
        output[k] = input[k] * scalar;
    }
}

__global__ void scalar_mul_unaligned(
    const float* __restrict__ input,
    float* __restrict__ output,
    float scalar,
    int64_t count)
{
    const int64_t step = static_cast<int64_t>(gridDim.x) * blockDim.x;
    for (int64_t i = static_cast<int64_t>(blockIdx.x) * blockDim.x
                     + threadIdx.x;
         i < count; i += step) {
        output[i] = input[i] * scalar;
    }
}

torch::Tensor scalar_mul_cuda(torch::Tensor input, double scalar) {
    TORCH_CHECK(input.is_cuda(), "Expected CUDA input");
    TORCH_CHECK(input.scalar_type() == at::kFloat, "Expected float32 input");
    TORCH_CHECK(input.is_contiguous(), "Expected contiguous input");

    const c10::cuda::CUDAGuard guard(input.device());
    auto output = torch::empty_like(input);
    const int64_t count = input.numel();
    if (count == 0) return output;

    constexpr int threads = 256;
    const int max_blocks =
        at::cuda::getCurrentDeviceProperties()->multiProcessorCount * 8;
    const auto stream =
        c10::cuda::getCurrentCUDAStream(input.get_device()).stream();
    const float* src = input.data_ptr<float>();
    float* dst = output.data_ptr<float>();

    if ((reinterpret_cast<uintptr_t>(src) & 15) == 0) {
        const int blocks = static_cast<int>(std::min<int64_t>(
            (count + threads * 16 - 1) / (threads * 16), max_blocks));
        scalar_mul_streaming<threads><<<blocks, threads, 0, stream>>>(
            src, dst, static_cast<float>(scalar), count);
    } else {
        const int blocks = static_cast<int>(std::min<int64_t>(
            (count + threads - 1) / threads, max_blocks));
        scalar_mul_unaligned<<<blocks, threads, 0, stream>>>(
            src, dst, static_cast<float>(scalar), count);
    }
    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return output;
}
"""

_extension = load_inline(
    name="matrix_scalar_mul_streaming_v2",
    cpp_sources="torch::Tensor scalar_mul_cuda(torch::Tensor input, double scalar);",
    cuda_sources=_cuda_source,
    functions=["scalar_mul_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(self):
        super().__init__()

    def forward(self, A: torch.Tensor, s: float) -> torch.Tensor:
        if (
            A.is_cuda
            and A.dtype == torch.float32
            and A.is_contiguous()
            and not (torch.is_grad_enabled() and A.requires_grad)
        ):
            return _extension.scalar_mul_cuda(A, s)
        return A * s
```
Result of evaluating it:
The solution is correct on the test inputs. Mean runtime 6.45 ms; the PyTorch reference (with TF32 enabled) takes 6.24 ms; speedup 0.967x.
Profiler, top device kernels of one forward pass of your solution:
| device kernel | total device time (us) | calls |
|---|---|---|
| void scalar_mul_streaming<256>(float const*, float*, float, long) | 6414.1 | 1 |

The fastest correct solution so far (0.984x speedup) is:
```python
import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline


_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAStream.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <algorithm>
#include <cstdint>

__global__ void scalar_mul_vectorized(
    const float* __restrict__ input,
    float* __restrict__ output,
    const float scalar,
    const int64_t count)
{
    const int64_t index =
        static_cast<int64_t>(blockIdx.x) * blockDim.x + threadIdx.x;
    const int64_t stride =
        static_cast<int64_t>(gridDim.x) * blockDim.x;
    const int64_t vector_count = count / 4;

    const float4* input4 = reinterpret_cast<const float4*>(input);
    float4* output4 = reinterpret_cast<float4*>(output);

    for (int64_t i = index; i < vector_count; i += stride) {
        float4 value = input4[i];
        value.x *= scalar;
        value.y *= scalar;
        value.z *= scalar;
        value.w *= scalar;
        output4[i] = value;
    }

    const int64_t tail = vector_count * 4 + index;
    if (tail < count) {
        output[tail] = input[tail] * scalar;
    }
}

__global__ void scalar_mul_unaligned(
    const float* __restrict__ input,
    float* __restrict__ output,
    const float scalar,
    const int64_t count)
{
    const int64_t index =
        static_cast<int64_t>(blockIdx.x) * blockDim.x + threadIdx.x;
    const int64_t stride =
        static_cast<int64_t>(gridDim.x) * blockDim.x;

    for (int64_t i = index; i < count; i += stride) {
        output[i] = input[i] * scalar;
    }
}

torch::Tensor scalar_mul_cuda(torch::Tensor input, double scalar) {
    TORCH_CHECK(input.is_cuda(), "Expected a CUDA tensor");
    TORCH_CHECK(input.scalar_type() == at::kFloat, "Expected float32");
    TORCH_CHECK(input.is_contiguous(), "Expected a contiguous tensor");

    const c10::cuda::CUDAGuard guard(input.device());
    auto output = torch::empty_like(input);
    const int64_t count = input.numel();

    if (count == 0) {
        return output;
    }

    const float* input_ptr = input.data_ptr<float>();
    float* output_ptr = output.data_ptr<float>();
    const bool aligned =
        (reinterpret_cast<uintptr_t>(input_ptr) % alignof(float4)) == 0;

    constexpr int threads = 256;
    const int64_t work = aligned ? (count + 3) / 4 : count;
    const int64_t max_blocks =
        static_cast<int64_t>(
            at::cuda::getCurrentDeviceProperties()->multiProcessorCount) * 16;
    const int blocks = static_cast<int>(
        std::min((work + threads - 1) / threads, max_blocks));
    const cudaStream_t stream =
        c10::cuda::getCurrentCUDAStream(input.get_device()).stream();

    if (aligned) {
        scalar_mul_vectorized<<<blocks, threads, 0, stream>>>(
            input_ptr, output_ptr, static_cast<float>(scalar), count);
    } else {
        scalar_mul_unaligned<<<blocks, threads, 0, stream>>>(
            input_ptr, output_ptr, static_cast<float>(scalar), count);
    }

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return output;
}
"""

_extension = load_inline(
    name="matrix_scalar_mul_vectorized",
    cpp_sources=(
        "torch::Tensor scalar_mul_cuda(torch::Tensor input, double scalar);"
    ),
    cuda_sources=_cuda_source,
    functions=["scalar_mul_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(self):
        super().__init__()

    def forward(self, A: torch.Tensor, s: float) -> torch.Tensor:
        if (
            A.is_cuda
            and A.dtype == torch.float32
            and A.is_contiguous()
            and not (torch.is_grad_enabled() and A.requires_grad)
        ):
            return _extension.scalar_mul_cuda(A, s)
        return A * s
```

Write an improved complete ModelNew: fix any error, and if the solution is already correct, make it faster. Output the new code in one ```python codeblock. Just the model code, no other text, and NO testing code.
