```python
import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline


_cpp_source = r"""
#include <torch/extension.h>

torch::Tensor flip_transpose_weight_cuda(torch::Tensor weight);
torch::Tensor expand_output_cuda(
    torch::Tensor input, torch::Tensor bias, bool has_bias);
"""

_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/Dispatch.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAStream.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <algorithm>
#include <cstdint>

template <typename scalar_t>
__global__ void flip_transpose_weight_kernel(
    const scalar_t* __restrict__ weight,
    scalar_t* __restrict__ output,
    int in_channels,
    int out_channels,
    int64_t count)
{
    for (int64_t i = int64_t(blockIdx.x) * blockDim.x + threadIdx.x;
         i < count;
         i += int64_t(blockDim.x) * gridDim.x) {
        const int kernel_index = i % 27;
        const int input_channel = (i / 27) % in_channels;
        const int output_channel = i / (27LL * in_channels);

        const int64_t source =
            (int64_t(input_channel) * out_channels + output_channel) * 27
            + 26 - kernel_index;
        output[i] = weight[source];
    }
}

template <typename scalar_t, bool HAS_BIAS>
__global__ void expand_output_kernel(
    const scalar_t* __restrict__ input,
    const scalar_t* __restrict__ bias,
    scalar_t* __restrict__ output,
    int channels,
    int depth,
    int height,
    int width,
    int64_t count)
{
    const int output_depth = 2 * depth + 1;
    const int output_height = 2 * height + 1;
    const int output_width = 2 * width + 1;

    for (int64_t i = int64_t(blockIdx.x) * blockDim.x + threadIdx.x;
         i < count;
         i += int64_t(blockDim.x) * gridDim.x) {
        int64_t q = i;
        const int w = q % output_width;
        q /= output_width;
        const int h = q % output_height;
        q /= output_height;
        const int d = q % output_depth;
        const int64_t nc = q / output_depth;

        scalar_t value = scalar_t(0);
        if ((d & h & w & 1) != 0) {
            const int64_t source =
                ((nc * depth + d / 2) * height + h / 2) * width + w / 2;
            value = input[source];
        }

        if (HAS_BIAS) {
            value = value + bias[nc % channels];
        }
        output[i] = value;
    }
}

torch::Tensor flip_transpose_weight_cuda(torch::Tensor weight)
{
    const c10::cuda::CUDAGuard device_guard(weight.device());
    const int in_channels = weight.size(0);
    const int out_channels = weight.size(1);

    auto output = torch::empty(
        {out_channels, in_channels, 3, 3, 3}, weight.options());

    const int threads = 256;
    const int blocks = static_cast<int>(
        std::min<int64_t>((output.numel() + threads - 1) / threads, 4096));
    const auto stream = c10::cuda::getCurrentCUDAStream();

    AT_DISPATCH_FLOATING_TYPES_AND2(
        at::ScalarType::Half,
        at::ScalarType::BFloat16,
        weight.scalar_type(),
        "flip_transpose_weight_cuda",
        [&] {
            flip_transpose_weight_kernel<scalar_t>
                <<<blocks, threads, 0, stream.stream()>>>(
                    weight.data_ptr<scalar_t>(),
                    output.data_ptr<scalar_t>(),
                    in_channels,
                    out_channels,
                    output.numel());
        });

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return output;
}

torch::Tensor expand_output_cuda(
    torch::Tensor input, torch::Tensor bias, bool has_bias)
{
    const c10::cuda::CUDAGuard device_guard(input.device());

    const int64_t batch = input.size(0);
    const int channels = input.size(1);
    const int depth = input.size(2);
    const int height = input.size(3);
    const int width = input.size(4);

    auto output = torch::empty(
        {batch, int64_t(channels), 2LL * depth + 1,
         2LL * height + 1, 2LL * width + 1},
        input.options());

    if (output.numel() == 0) {
        return output;
    }

    const int threads = 256;
    const int blocks = static_cast<int>(
        std::min<int64_t>((output.numel() + threads - 1) / threads, 4096));
    const auto stream = c10::cuda::getCurrentCUDAStream();

    AT_DISPATCH_FLOATING_TYPES_AND2(
        at::ScalarType::Half,
        at::ScalarType::BFloat16,
        input.scalar_type(),
        "expand_output_cuda",
        [&] {
            if (has_bias) {
                expand_output_kernel<scalar_t, true>
                    <<<blocks, threads, 0, stream.stream()>>>(
                        input.data_ptr<scalar_t>(),
                        bias.data_ptr<scalar_t>(),
                        output.data_ptr<scalar_t>(),
                        channels, depth, height, width, output.numel());
            } else {
                expand_output_kernel<scalar_t, false>
                    <<<blocks, threads, 0, stream.stream()>>>(
                        input.data_ptr<scalar_t>(),
                        nullptr,
                        output.data_ptr<scalar_t>(),
                        channels, depth, height, width, output.numel());
            }
        });

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return output;
}
"""

_ops = load_inline(
    name="sparse_transpose3d_stride2_dilation2_v1",
    cpp_sources=_cpp_source,
    cuda_sources=_cuda_source,
    functions=["flip_transpose_weight_cuda", "expand_output_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(
        self,
        in_channels: int,
        out_channels: int,
        kernel_size: int,
        stride: int = 1,
        padding: int = 0,
        dilation: int = 1,
        bias: bool = False,
    ):
        super().__init__()
        self.conv_transpose3d = nn.ConvTranspose3d(
            in_channels,
            out_channels,
            kernel_size=(kernel_size, kernel_size, kernel_size),
            stride=stride,
            padding=padding,
            dilation=dilation,
            bias=bias,
        )

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        conv = self.conv_transpose3d
        supported = (
            x.is_cuda
            and x.ndim == 5
            and x.dtype == conv.weight.dtype
            and x.dtype in (
                torch.float16,
                torch.bfloat16,
                torch.float32,
                torch.float64,
            )
            and conv.kernel_size == (3, 3, 3)
            and conv.stride == (2, 2, 2)
            and conv.padding == (1, 1, 1)
            and conv.dilation == (2, 2, 2)
            and conv.output_padding == (0, 0, 0)
            and conv.groups == 1
        )
        if not supported:
            return conv(x)

        # Only odd coordinates contain convolution contributions. Compute
        # those on the compact grid, then expand and add bias in one kernel.
        weight = _ops.flip_transpose_weight_cuda(conv.weight.contiguous())
        compact = F.conv3d(
            x.contiguous(),
            weight,
            bias=None,
            stride=1,
            padding=1,
            dilation=1,
        ).contiguous()

        has_bias = conv.bias is not None
        bias_tensor = (
            conv.bias.to(dtype=compact.dtype).contiguous()
            if has_bias
            else compact
        )
        return _ops.expand_output_cuda(compact, bias_tensor, has_bias)
```