```python
import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline


_cpp_source = r"""
#include <torch/extension.h>

torch::Tensor reverse_transpose_weight_cuda(torch::Tensor weight);
torch::Tensor expand_output_cuda(
    torch::Tensor compact,
    c10::optional<torch::Tensor> bias);
"""

_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/AccumulateType.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <algorithm>

template <typename scalar_t>
__global__ void reverse_transpose_weight_kernel(
    const scalar_t* __restrict__ weight,
    scalar_t* __restrict__ result,
    int64_t count,
    int in_channels,
    int out_channels) {
    for (int64_t i = int64_t(blockIdx.x) * blockDim.x + threadIdx.x;
         i < count;
         i += int64_t(blockDim.x) * gridDim.x) {
        const int k = i % 27;
        const int ci = (i / 27) % in_channels;
        const int co = i / (27LL * in_channels);
        result[i] = weight[
            (int64_t(ci) * out_channels + co) * 27 + 26 - k];
    }
}

template <typename scalar_t, bool HasBias>
__global__ void expand_output_kernel(
    const scalar_t* __restrict__ compact,
    const scalar_t* __restrict__ bias,
    scalar_t* __restrict__ output,
    int64_t count,
    int channels,
    int depth,
    int height,
    int width) {
    using acc_t = at::acc_type<scalar_t, true>;

    const int out_height = 2 * height + 1;
    const int out_width = 2 * width + 1;
    const int64_t out_volume =
        int64_t(2 * depth + 1) * out_height * out_width;
    const int64_t compact_volume = int64_t(depth) * height * width;

    for (int64_t i = int64_t(blockIdx.x) * blockDim.x + threadIdx.x;
         i < count;
         i += int64_t(blockDim.x) * gridDim.x) {
        const int64_t nc = i / out_volume;
        const int64_t spatial = i - nc * out_volume;
        const int ow = spatial % out_width;
        const int oh = (spatial / out_width) % out_height;
        const int od = spatial / (int64_t(out_height) * out_width);

        acc_t value = acc_t(0);
        if ((od & oh & ow & 1) != 0) {
            const int64_t source =
                nc * compact_volume +
                (int64_t(od >> 1) * height + (oh >> 1)) * width +
                (ow >> 1);
            value = static_cast<acc_t>(compact[source]);
        }
        if (HasBias) {
            value += static_cast<acc_t>(bias[nc % channels]);
        }
        output[i] = static_cast<scalar_t>(value);
    }
}

torch::Tensor reverse_transpose_weight_cuda(torch::Tensor weight) {
    const c10::cuda::CUDAGuard guard(weight.device());
    TORCH_CHECK(weight.is_contiguous(), "Weight must be contiguous");
    TORCH_CHECK(
        weight.dim() == 5 &&
        weight.size(2) == 3 &&
        weight.size(3) == 3 &&
        weight.size(4) == 3,
        "Expected a 3x3x3 kernel");

    const int ci = weight.size(0);
    const int co = weight.size(1);
    auto result = torch::empty({co, ci, 3, 3, 3}, weight.options());
    const int64_t count = result.numel();
    const int blocks =
        static_cast<int>(std::min<int64_t>((count + 255) / 256, 65535));
    const auto stream = at::cuda::getCurrentCUDAStream();

    AT_DISPATCH_FLOATING_TYPES_AND2(
        at::ScalarType::Half,
        at::ScalarType::BFloat16,
        weight.scalar_type(),
        "reverse_transpose_weight_cuda",
        [&] {
            reverse_transpose_weight_kernel<scalar_t>
                <<<blocks, 256, 0, stream>>>(
                    weight.data_ptr<scalar_t>(),
                    result.data_ptr<scalar_t>(),
                    count, ci, co);
        });
    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return result;
}

torch::Tensor expand_output_cuda(
    torch::Tensor compact,
    c10::optional<torch::Tensor> bias) {
    const c10::cuda::CUDAGuard guard(compact.device());
    TORCH_CHECK(compact.is_contiguous(), "Compact output must be contiguous");

    const int64_t batch = compact.size(0);
    const int channels = compact.size(1);
    const int depth = compact.size(2);
    const int height = compact.size(3);
    const int width = compact.size(4);

    auto output = torch::empty(
        {batch, channels, 2LL * depth + 1,
         2LL * height + 1, 2LL * width + 1},
        compact.options());

    const int64_t count = output.numel();
    if (count == 0) {
        return output;
    }

    const bool has_bias = bias.has_value();
    if (has_bias) {
        TORCH_CHECK(
            bias->device() == compact.device() &&
            bias->scalar_type() == compact.scalar_type() &&
            bias->is_contiguous() &&
            bias->numel() == channels,
            "Invalid bias");
    }

    const int blocks =
        static_cast<int>(std::min<int64_t>((count + 255) / 256, 65535));
    const auto stream = at::cuda::getCurrentCUDAStream();

    AT_DISPATCH_FLOATING_TYPES_AND2(
        at::ScalarType::Half,
        at::ScalarType::BFloat16,
        compact.scalar_type(),
        "expand_output_cuda",
        [&] {
            if (has_bias) {
                expand_output_kernel<scalar_t, true>
                    <<<blocks, 256, 0, stream>>>(
                        compact.data_ptr<scalar_t>(),
                        bias->data_ptr<scalar_t>(),
                        output.data_ptr<scalar_t>(),
                        count, channels, depth, height, width);
            } else {
                expand_output_kernel<scalar_t, false>
                    <<<blocks, 256, 0, stream>>>(
                        compact.data_ptr<scalar_t>(),
                        nullptr,
                        output.data_ptr<scalar_t>(),
                        count, channels, depth, height, width);
            }
        });
    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return output;
}
"""

_ops = load_inline(
    name="sparse_conv_transpose3d_cuda_v1",
    cpp_sources=_cpp_source,
    cuda_sources=_cuda_source,
    functions=[
        "reverse_transpose_weight_cuda",
        "expand_output_cuda",
    ],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(
        self,
        in_channels: int,
        out_channels: int,
        kernel_size: int,
        stride: int = 1,
        padding: int = 0,
        dilation: int = 1,
        bias: bool = False,
    ):
        super().__init__()
        self.conv_transpose3d = nn.ConvTranspose3d(
            in_channels,
            out_channels,
            kernel_size=(kernel_size, kernel_size, kernel_size),
            stride=stride,
            padding=padding,
            dilation=dilation,
            bias=bias,
        )

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        conv = self.conv_transpose3d
        specialized = (
            x.is_cuda
            and x.ndim == 5
            and x.shape[0] > 0
            and x.dtype == conv.weight.dtype
            and x.dtype in (
                torch.float16,
                torch.bfloat16,
                torch.float32,
                torch.float64,
            )
            and conv.kernel_size == (3, 3, 3)
            and conv.stride == (2, 2, 2)
            and conv.padding == (1, 1, 1)
            and conv.dilation == (2, 2, 2)
            and conv.output_padding == (0, 0, 0)
            and conv.groups == 1
        )
        if not specialized:
            return conv(x)

        # Only odd coordinates receive convolution contributions.
        # Compute that compact lattice with a dense convolution.
        weight = _ops.reverse_transpose_weight_cuda(
            conv.weight.contiguous()
        )
        compact = F.conv3d(x, weight, bias=None, stride=1, padding=1)

        bias = conv.bias
        if bias is not None:
            bias = bias.to(dtype=compact.dtype).contiguous()

        return _ops.expand_output_cuda(compact.contiguous(), bias)
```