```python
import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

_cpp_source = r"""
#include <torch/extension.h>
#include <optional>

torch::Tensor expand_sparse_3d_cuda(
    torch::Tensor x,
    std::optional<torch::Tensor> bias);
"""

_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include <optional>

template <typename scalar_t>
__global__ void expand_sparse_3d_kernel(
    const scalar_t* __restrict__ x,
    const scalar_t* __restrict__ bias,
    scalar_t* __restrict__ out,
    int64_t count,
    int channels,
    int depth,
    int height,
    int width)
{
    const int out_d = 2 * depth + 1;
    const int out_h = 2 * height + 1;
    const int out_w = 2 * width + 1;

    for (int64_t i = int64_t(blockIdx.x) * blockDim.x + threadIdx.x;
         i < count;
         i += int64_t(blockDim.x) * gridDim.x) {
        int64_t q = i;
        const int w = q % out_w;
        q /= out_w;
        const int h = q % out_h;
        q /= out_h;
        const int d = q % out_d;
        const int64_t nc = q / out_d;

        scalar_t value = scalar_t(0);
        if ((d & 1) && (h & 1) && (w & 1)) {
            const int64_t src =
                ((nc * depth + (d >> 1)) * height + (h >> 1))
                * width + (w >> 1);
            value = x[src];
        }
        if (bias != nullptr) {
            value = value + bias[nc % channels];
        }
        out[i] = value;
    }
}

torch::Tensor expand_sparse_3d_cuda(
    torch::Tensor x,
    std::optional<torch::Tensor> bias)
{
    TORCH_CHECK(x.is_cuda() && x.is_contiguous() && x.dim() == 5,
                "Expected a contiguous CUDA NCDHW tensor");
    const c10::cuda::CUDAGuard guard(x.device());

    const int64_t n = x.size(0);
    const int c = x.size(1);
    const int d = x.size(2);
    const int h = x.size(3);
    const int w = x.size(4);

    auto out = torch::empty(
        {n, int64_t(c), 2LL * d + 1, 2LL * h + 1, 2LL * w + 1},
        x.options());

    if (bias.has_value()) {
        TORCH_CHECK(
            bias->device() == x.device() &&
            bias->scalar_type() == x.scalar_type() &&
            bias->is_contiguous() && bias->numel() == c,
            "Bias must match the output device, dtype, and channels");
    }

    const int64_t count = out.numel();
    if (count == 0) {
        return out;
    }

    constexpr int threads = 256;
    const int blocks = static_cast<int>(
        std::min<int64_t>((count + threads - 1) / threads, 65535));
    const auto stream = at::cuda::getCurrentCUDAStream();

    AT_DISPATCH_FLOATING_TYPES_AND2(
        at::ScalarType::Half, at::ScalarType::BFloat16,
        x.scalar_type(), "expand_sparse_3d_cuda", [&] {
            const scalar_t* bias_ptr = bias.has_value()
                ? bias->data_ptr<scalar_t>() : nullptr;

            expand_sparse_3d_kernel<scalar_t>
                <<<blocks, threads, 0, stream>>>(
                    x.data_ptr<scalar_t>(),
                    bias_ptr,
                    out.data_ptr<scalar_t>(),
                    count, c, d, h, w);
        });

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return out;
}
"""

_sparse_ops = load_inline(
    name="sparse_conv_transpose3d_expand_v1",
    cpp_sources=_cpp_source,
    cuda_sources=_cuda_source,
    functions=["expand_sparse_3d_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(
        self,
        in_channels: int,
        out_channels: int,
        kernel_size: int,
        stride: int = 1,
        padding: int = 0,
        dilation: int = 1,
        bias: bool = False,
    ):
        super().__init__()
        self.conv_transpose3d = nn.ConvTranspose3d(
            in_channels,
            out_channels,
            kernel_size=(kernel_size, kernel_size, kernel_size),
            stride=stride,
            padding=padding,
            dilation=dilation,
            bias=bias,
        )

    def forward(self, x: torch.Tensor) -> torch.Tensor:
        conv = self.conv_transpose3d

        specialized = (
            x.is_cuda
            and x.ndim == 5
            and conv.kernel_size == (3, 3, 3)
            and conv.stride == (2, 2, 2)
            and conv.padding == (1, 1, 1)
            and conv.dilation == (2, 2, 2)
            and conv.output_padding == (0, 0, 0)
        )

        if not specialized:
            return conv(x)

        # Nonzero contributions occupy only odd spatial coordinates.
        # Compute that compact lattice before expanding it with CUDA.
        compact = F.conv_transpose3d(
            x,
            conv.weight,
            bias=None,
            stride=1,
            padding=1,
            output_padding=0,
            groups=conv.groups,
            dilation=1,
        ).contiguous()

        output_bias = conv.bias
        if output_bias is not None and output_bias.dtype != compact.dtype:
            output_bias = output_bias.to(dtype=compact.dtype)

        return _sparse_ops.expand_sparse_3d_cuda(compact, output_bias)
```