You write custom CUDA kernels to replace the pytorch operators in the given architecture to get speedups. 

    You have complete freedom to choose the set of operators you want to replace. You may make the decision to replace some operators with custom CUDA kernels and leave others unchanged. You may replace multiple operators with custom implementations, consider operator fusion opportunities (combining multiple operators into a single kernel, for example, combining matmul+relu), or algorithmic changes (such as online softmax). You are only limited by your imagination.


        Here's an example to show you the syntax of inline embedding custom CUDA operators in torch: The example given architecture is: 

        ``` 

        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F


class Model(nn.Module):
    def __init__(self) -> None:
        super().__init__()

    def forward(self, a, b):
        return a + b


def get_inputs():
    # randomly generate input tensors based on the model architecture
    a = torch.randn(1, 128).cuda()
    b = torch.randn(1, 128).cuda()
    return [a, b]


def get_init_inputs():
    # randomly generate tensors required for initialization based on the model architecture
    return []

        ``` 

        The example new arch with custom CUDA kernels looks like this:
        ```
        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Define the custom CUDA kernel for element-wise addition
elementwise_add_source = """
#include <torch/extension.h>
#include <cuda_runtime.h>

__global__ void elementwise_add_kernel(const float* a, const float* b, float* out, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        out[idx] = a[idx] + b[idx];
    }
}

torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b) {
    auto size = a.numel();
    auto out = torch::zeros_like(a);

    const int block_size = 256;
    const int num_blocks = (size + block_size - 1) / block_size;

    elementwise_add_kernel<<<num_blocks, block_size>>>(a.data_ptr<float>(), b.data_ptr<float>(), out.data_ptr<float>(), size);

    return out;
}
"""

elementwise_add_cpp_source = (
    "torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b);"
)

# Compile the inline CUDA code for element-wise addition
elementwise_add = load_inline(
    name="elementwise_add",
    cpp_sources=elementwise_add_cpp_source,
    cuda_sources=elementwise_add_source,
    functions=["elementwise_add_cuda"],
    verbose=True,
    extra_cflags=[""],
    extra_ldflags=[""],
)


class ModelNew(nn.Module):
    def __init__(self) -> None:
        super().__init__()
        self.elementwise_add = elementwise_add

    def forward(self, a, b):
        return self.elementwise_add.elementwise_add_cuda(a, b)

        ``` 

        
    You are given the following architecture: 

    ```
    # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Model that performs a transposed convolution, applies Mish activation, adds a value, 
    applies Hardtanh activation, and scales the output.
    """
    def __init__(self, in_channels, out_channels, kernel_size, stride, padding, output_padding, add_value, scale):
        super(Model, self).__init__()
        self.conv_transpose = nn.ConvTranspose2d(in_channels, out_channels, kernel_size, stride, padding, output_padding)
        self.add_value = add_value
        self.scale = scale

    def forward(self, x):
        x = self.conv_transpose(x)
        x = torch.nn.functional.mish(x) # Mish activation
        x = x + self.add_value
        x = torch.nn.functional.hardtanh(x, min_val=-1, max_val=1) # Hardtanh activation
        x = x * self.scale # Scaling
        return x

batch_size = 128
in_channels  = 64  
out_channels = 64  
height = width = 128  
kernel_size  = 3
stride       = 2  
padding      = 1
output_padding = 1
add_value = 0.5
scale = 2

def get_inputs():
    return [torch.rand(batch_size, in_channels, height, width)]

def get_init_inputs():
    return [in_channels, out_channels, kernel_size, stride, padding, output_padding, add_value, scale]
    ```
    
Optimize the architecture named Model with custom CUDA operators! Name your optimized output architecture ModelNew. Output the new code in codeblocks. Please generate real code, NOT pseudocode, make sure the code compiles and is fully functional. Just output the new model code, no other text, and NO testing code! 



This is turn 3 of 6 for this task. Your previous solution (turn 2) was:
```python
import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline


_cpp_source = r"""
#include <torch/extension.h>

torch::Tensor fused_bias_mish_cuda(
    torch::Tensor x, torch::Tensor bias, double add_value, double scale);
"""

_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <algorithm>
#include <cstdint>

__device__ __forceinline__ float activate(
    float x, float bias, float add_value, float scale) {
    x = x + bias;

    float mish;
    if (x > 20.0f) {
        mish = x;
    } else {
        const float e = expf(x);
        const float numerator = e * (e + 2.0f);
        mish = x * (numerator / (numerator + 2.0f));
    }

    float y = mish + add_value;
    y = y < -1.0f ? -1.0f : y;
    y = y >  1.0f ?  1.0f : y;
    return y * scale;
}

template<int FixedChannels>
__global__ void fused_vector_kernel(
    const float4* __restrict__ input,
    const float4* __restrict__ bias,
    float4* __restrict__ output,
    int64_t vector_count,
    int channels,
    float add_value,
    float scale) {

    const int channels4 =
        (FixedChannels > 0 ? FixedChannels : channels) / 4;
    const int64_t first =
        static_cast<int64_t>(blockIdx.x) * blockDim.x + threadIdx.x;
    const int64_t step =
        static_cast<int64_t>(gridDim.x) * blockDim.x;

    for (int64_t i = first; i < vector_count; i += step) {
        const float4 v = input[i];
        const float4 b = bias[i % channels4];
        float4 result;
        result.x = activate(v.x, b.x, add_value, scale);
        result.y = activate(v.y, b.y, add_value, scale);
        result.z = activate(v.z, b.z, add_value, scale);
        result.w = activate(v.w, b.w, add_value, scale);
        output[i] = result;
    }
}

__global__ void fused_scalar_kernel(
    const float* __restrict__ input,
    const float* __restrict__ bias,
    float* __restrict__ output,
    int64_t count,
    int channels,
    float add_value,
    float scale) {

    const int64_t first =
        static_cast<int64_t>(blockIdx.x) * blockDim.x + threadIdx.x;
    const int64_t step =
        static_cast<int64_t>(gridDim.x) * blockDim.x;

    for (int64_t i = first; i < count; i += step) {
        output[i] = activate(
            input[i], bias[i % channels], add_value, scale);
    }
}

torch::Tensor fused_bias_mish_cuda(
    torch::Tensor x,
    torch::Tensor bias,
    double add_value,
    double scale) {

    TORCH_CHECK(x.is_cuda() && bias.is_cuda(), "Expected CUDA tensors");
    TORCH_CHECK(
        x.scalar_type() == at::kFloat &&
        bias.scalar_type() == at::kFloat,
        "Expected float32 tensors");
    TORCH_CHECK(x.device() == bias.device(), "Device mismatch");
    TORCH_CHECK(
        x.dim() == 4 &&
        x.is_contiguous(at::MemoryFormat::ChannelsLast),
        "Expected channels-last input");
    TORCH_CHECK(
        bias.is_contiguous() && bias.numel() == x.size(1),
        "Invalid bias");

    const c10::cuda::CUDAGuard guard(x.device());
    auto output = torch::empty_like(x);
    const int64_t count = x.numel();
    if (count == 0) {
        return output;
    }

    const int channels = static_cast<int>(x.size(1));
    constexpr int threads = 256;
    const bool vectorized = channels % 4 == 0;
    const int64_t work = vectorized ? count / 4 : count;
    const int blocks = static_cast<int>(
        std::min<int64_t>((work + threads - 1) / threads, 4096));
    const auto stream = at::cuda::getCurrentCUDAStream();

    if (vectorized) {
        const auto* input4 =
            reinterpret_cast<const float4*>(x.data_ptr<float>());
        const auto* bias4 =
            reinterpret_cast<const float4*>(bias.data_ptr<float>());
        auto* output4 =
            reinterpret_cast<float4*>(output.data_ptr<float>());

        if (channels == 64) {
            fused_vector_kernel<64><<<blocks, threads, 0, stream>>>(
                input4, bias4, output4, work, channels,
                static_cast<float>(add_value), static_cast<float>(scale));
        } else {
            fused_vector_kernel<0><<<blocks, threads, 0, stream>>>(
                input4, bias4, output4, work, channels,
                static_cast<float>(add_value), static_cast<float>(scale));
        }
    } else {
        fused_scalar_kernel<<<blocks, threads, 0, stream>>>(
            x.data_ptr<float>(), bias.data_ptr<float>(),
            output.data_ptr<float>(), count, channels,
            static_cast<float>(add_value), static_cast<float>(scale));
    }

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return output;
}
"""

_fused_ops = load_inline(
    name="channels_last_bias_mish_hardtanh_scale_v2",
    cpp_sources=_cpp_source,
    cuda_sources=_cuda_source,
    functions=["fused_bias_mish_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3", "--fmad=false"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(
        self,
        in_channels,
        out_channels,
        kernel_size,
        stride,
        padding,
        output_padding,
        add_value,
        scale,
    ):
        super().__init__()
        self.conv_transpose = nn.ConvTranspose2d(
            in_channels,
            out_channels,
            kernel_size,
            stride,
            padding,
            output_padding,
        )
        self.conv_transpose.to(memory_format=torch.channels_last)
        self.add_value = add_value
        self.scale = scale

    def forward(self, x):
        conv = self.conv_transpose
        if (
            x.is_cuda
            and x.dtype == torch.float32
            and conv.weight.dtype == torch.float32
            and not torch.is_autocast_enabled()
        ):
            x = x.contiguous(memory_format=torch.channels_last)
            x = F.conv_transpose2d(
                x,
                conv.weight,
                bias=None,
                stride=conv.stride,
                padding=conv.padding,
                output_padding=conv.output_padding,
                groups=conv.groups,
                dilation=conv.dilation,
            )
            x = x.contiguous(memory_format=torch.channels_last)
            return _fused_ops.fused_bias_mish_cuda(
                x, conv.bias, float(self.add_value), float(self.scale)
            )

        x = conv(x)
        return F.hardtanh(
            F.mish(x) + self.add_value, min_val=-1.0, max_val=1.0
        ) * self.scale
```
Result of evaluating it:
The solution is correct on the test inputs. Mean runtime 8.71 ms; the PyTorch reference (with TF32 enabled) takes 23.2 ms; speedup 2.664x.
Profiler, top device kernels of one forward pass of your solution:
| device kernel | total device time (us) | calls |
|---|---|---|
| sm80_xmma_dgrad_implicit_gemm_indexed_tf32f32_tf32f32_f32_nhwckrsc_nhwc_tilesize256x64x32_ | 3625.4 | 1 |
| void fused_vector_kernel<64>(float4 const*, float4 const*, float4*, long, int, float, floa | 3168.3 | 1 |
| void at::native::elementwise_kernel<128, 2, at::native::gpu_kernel_impl_nocast<at::native: | 982.2 | 1 |
| void cudnn::engines_precompiled::convertTensor_kernel<float, float, float, (cudnnKernelDat | 869.8 | 2 |
| void xmma__5x_cudnn::implicit_gemm::strided_dgrad_indexed::kernel_helper_stage_3<xmma__5x_ | 49.0 | 1 |
| void xmma__5x_cudnn::implicit_gemm::strided_dgrad_indexed::kernel_helper_stage_1<xmma__5x_ | 3.9 | 1 |
| void xmma__5x_cudnn::implicit_gemm::strided_dgrad_indexed::kernel_helper_stage_2<xmma__5x_ | 3.5 | 1 |
| void xmma__5x_cudnn::implicit_gemm::strided_dgrad_indexed::kernel_helper_stage_0<xmma__5x_ | 3.1 | 1 |

Write an improved complete ModelNew: fix any error, and if the solution is already correct, make it faster. Output the new code in one ```python codeblock. Just the model code, no other text, and NO testing code.
