```python
import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline

_cpp_source = r"""
#include <torch/extension.h>
torch::Tensor fused_hardswish_relu_cuda(torch::Tensor x);
"""

_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/OpMathType.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAStream.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <algorithm>

template <typename T>
__device__ __forceinline__ T activate(T x) {
    T gate = x + T(3);
    gate = gate < T(0) ? T(0) : gate;
    gate = gate > T(6) ? T(6) : gate;
    T y = (x * gate) / T(6);
    return y < T(0) ? T(0) : y;
}

__global__ void fused_float4_kernel(float* data, int64_t n) {
    const int64_t index =
        static_cast<int64_t>(blockIdx.x) * blockDim.x + threadIdx.x;
    const int64_t stride =
        static_cast<int64_t>(blockDim.x) * gridDim.x;

    float4* vectors = reinterpret_cast<float4*>(data);
    const int64_t vector_count = n / 4;

    for (int64_t i = index; i < vector_count; i += stride) {
        float4 v = vectors[i];
        v.x = activate(v.x);
        v.y = activate(v.y);
        v.z = activate(v.z);
        v.w = activate(v.w);
        vectors[i] = v;
    }

    for (int64_t i = vector_count * 4 + index; i < n; i += stride) {
        data[i] = activate(data[i]);
    }
}

template <typename scalar_t>
__global__ void fused_scalar_kernel(scalar_t* data, int64_t n) {
    using acc_t = at::opmath_type<scalar_t>;
    const int64_t index =
        static_cast<int64_t>(blockIdx.x) * blockDim.x + threadIdx.x;
    const int64_t stride =
        static_cast<int64_t>(blockDim.x) * gridDim.x;

    for (int64_t i = index; i < n; i += stride) {
        data[i] = static_cast<scalar_t>(
            activate(static_cast<acc_t>(data[i]))
        );
    }
}

torch::Tensor fused_hardswish_relu_cuda(torch::Tensor x) {
    TORCH_CHECK(x.is_cuda(), "Expected a CUDA tensor");
    TORCH_CHECK(
        x.is_contiguous() ||
        x.is_contiguous(at::MemoryFormat::ChannelsLast),
        "Expected a dense convolution output"
    );

    const c10::cuda::CUDAGuard device_guard(x.device());
    const int64_t n = x.numel();
    if (n == 0) {
        return x;
    }

    constexpr int threads = 256;
    const auto stream = c10::cuda::getCurrentCUDAStream();

    if (x.scalar_type() == at::ScalarType::Float) {
        const int64_t work = (n + 3) / 4;
        const int blocks = static_cast<int>(
            std::min<int64_t>((work + threads - 1) / threads, 4096)
        );
        fused_float4_kernel<<<blocks, threads, 0, stream.stream()>>>(
            x.data_ptr<float>(), n
        );
    } else {
        const int blocks = static_cast<int>(
            std::min<int64_t>((n + threads - 1) / threads, 4096)
        );
        AT_DISPATCH_FLOATING_TYPES_AND2(
            at::ScalarType::Half,
            at::ScalarType::BFloat16,
            x.scalar_type(),
            "fused_hardswish_relu",
            [&] {
                fused_scalar_kernel<scalar_t>
                    <<<blocks, threads, 0, stream.stream()>>>(
                        x.data_ptr<scalar_t>(), n
                    );
            }
        );
    }

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return x;
}
"""

_fused_activation = load_inline(
    name="conv_hardswish_relu_fused_v1",
    cpp_sources=_cpp_source,
    cuda_sources=_cuda_source,
    functions=["fused_hardswish_relu_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(self, in_channels, out_channels, kernel_size):
        super().__init__()
        self.conv = nn.Conv2d(in_channels, out_channels, kernel_size)

    def forward(self, x):
        x = self.conv(x)
        if not x.is_cuda:
            return torch.relu(torch.nn.functional.hardswish(x))
        return _fused_activation.fused_hardswish_relu_cuda(x)
```