```python
import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline

_cpp_source = r"""
#include <torch/extension.h>
torch::Tensor fused_pool_sum_cuda(torch::Tensor x);
"""

_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/AccumulateType.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cstdint>

template <typename T>
__device__ __forceinline__ T nan_max(T a, T b) {
    return isnan(a) ? a : (isnan(b) ? b : (a > b ? a : b));
}

// Consecutive non-overlapping pools of sizes 2 and 3 are equivalent
// to a single non-overlapping maximum over each 6x6x6 region.
template <typename scalar_t, typename acc_t>
__global__ void fused_pool_sum_kernel(
    const scalar_t* __restrict__ x,
    scalar_t* __restrict__ out,
    int channels,
    int depth,
    int height,
    int width,
    int out_depth,
    int out_height,
    int out_width,
    int64_t output_count
) {
    constexpr int WARPS = 8;
    __shared__ acc_t partial[WARPS];

    const int lane = threadIdx.x & 31;
    const int warp = threadIdx.x >> 5;
    const int64_t index = blockIdx.x;
    if (index >= output_count) return;

    int64_t remaining = index;
    const int ow = remaining % out_width;
    remaining /= out_width;
    const int oh = remaining % out_height;
    remaining /= out_height;
    const int od = remaining % out_depth;
    const int64_t batch = remaining / out_depth;

    const int64_t channel_stride =
        static_cast<int64_t>(depth) * height * width;
    const int64_t spatial_start =
        static_cast<int64_t>(od * 6) * height * width +
        static_cast<int64_t>(oh * 6) * width + ow * 6;

    acc_t channel_sum = acc_t(0);

    for (int c = warp; c < channels; c += WARPS) {
        const scalar_t* region =
            x + (batch * channels + c) * channel_stride + spatial_start;

        acc_t maximum = -static_cast<acc_t>(INFINITY);

        for (int p = lane; p < 216; p += 32) {
            const int dz = p / 36;
            const int dy = (p / 6) % 6;
            const int dx = p % 6;
            const acc_t value = static_cast<acc_t>(
                region[static_cast<int64_t>(dz) * height * width +
                       static_cast<int64_t>(dy) * width + dx]
            );
            maximum = nan_max(maximum, value);
        }

        #pragma unroll
        for (int offset = 16; offset > 0; offset >>= 1) {
            maximum = nan_max(
                maximum, __shfl_down_sync(0xffffffff, maximum, offset)
            );
        }

        if (lane == 0) channel_sum += maximum;
    }

    if (lane == 0) partial[warp] = channel_sum;
    __syncthreads();

    if (warp == 0) {
        acc_t total = lane < WARPS ? partial[lane] : acc_t(0);

        #pragma unroll
        for (int offset = 16; offset > 0; offset >>= 1) {
            total += __shfl_down_sync(0xffffffff, total, offset);
        }

        if (lane == 0) out[index] = static_cast<scalar_t>(total);
    }
}

torch::Tensor fused_pool_sum_cuda(torch::Tensor x) {
    TORCH_CHECK(x.is_cuda(), "Expected a CUDA tensor");
    TORCH_CHECK(x.dim() == 5, "Expected an NCDHW tensor");
    TORCH_CHECK(x.is_contiguous(), "Expected contiguous input");
    TORCH_CHECK(
        x.size(2) >= 6 && x.size(3) >= 6 && x.size(4) >= 6,
        "Spatial dimensions must be at least 6"
    );

    const c10::cuda::CUDAGuard device_guard(x.device());

    const int channels = x.size(1);
    const int depth = x.size(2);
    const int height = x.size(3);
    const int width = x.size(4);
    const int out_depth = depth / 6;
    const int out_height = height / 6;
    const int out_width = width / 6;

    auto out = torch::empty(
        {x.size(0), 1, out_depth, out_height, out_width}, x.options()
    );

    const int64_t count = out.numel();
    if (count == 0) return out;

    const auto stream = at::cuda::getCurrentCUDAStream();

    AT_DISPATCH_FLOATING_TYPES_AND2(
        at::ScalarType::Half,
        at::ScalarType::BFloat16,
        x.scalar_type(),
        "fused_pool_sum_cuda",
        [&] {
            using acc_t = at::acc_type<scalar_t, true>;
            fused_pool_sum_kernel<scalar_t, acc_t>
                <<<static_cast<unsigned int>(count), 256, 0, stream>>>(
                    x.data_ptr<scalar_t>(),
                    out.data_ptr<scalar_t>(),
                    channels,
                    depth,
                    height,
                    width,
                    out_depth,
                    out_height,
                    out_width,
                    count
                );
        }
    );

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return out;
}
"""

_fused_ops = load_inline(
    name="fused_pool6_channel_sum_cuda",
    cpp_sources=_cpp_source,
    cuda_sources=_cuda_source,
    functions=["fused_pool_sum_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(self, in_channels, out_channels, kernel_size, stride, padding):
        super().__init__()
        self.conv_transpose = nn.ConvTranspose3d(
            in_channels,
            out_channels,
            kernel_size,
            stride=stride,
            padding=padding,
        )
        self.max_pool1 = nn.MaxPool3d(kernel_size=2)
        self.max_pool2 = nn.MaxPool3d(kernel_size=3)

    def forward(self, x):
        x = self.conv_transpose(x)
        if not x.is_cuda or (torch.is_grad_enabled() and x.requires_grad):
            return self.max_pool2(self.max_pool1(x)).sum(dim=1, keepdim=True)
        return _fused_ops.fused_pool_sum_cuda(x.contiguous())
```