```python
import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

_cpp_source = r"""
#include <torch/extension.h>
torch::Tensor fused_pool_sum_cuda(torch::Tensor x);
"""

_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/AccumulateType.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <c10/cuda/CUDAException.h>
#include <cuda.h>
#include <cuda_runtime.h>

template <typename T>
__device__ __forceinline__ T nan_max(T a, T b) {
    return (a != a || a > b) ? a : b;
}

template <typename scalar_t>
__global__ void fused_pool_sum_kernel(
    const scalar_t* __restrict__ x,
    scalar_t* __restrict__ out,
    int64_t channels,
    int64_t depth,
    int64_t height,
    int64_t width,
    int64_t out_depth,
    int64_t out_height,
    int64_t out_width,
    int64_t output_count)
{
    using acc_t = at::acc_type<scalar_t, true>;

    constexpr int WARPS = 8;
    __shared__ acc_t partial[WARPS];

    const int lane = threadIdx.x & 31;
    const int warp = threadIdx.x >> 5;
    const int64_t spatial = out_depth * out_height * out_width;
    const int64_t channel_stride = depth * height * width;

    for (int64_t index = blockIdx.x; index < output_count;
         index += gridDim.x) {
        const int64_t batch = index / spatial;
        int64_t position = index % spatial;
        const int64_t ow = position % out_width;
        position /= out_width;
        const int64_t oh = position % out_height;
        const int64_t od = position / out_height;

        const int64_t origin =
            batch * channels * channel_stride +
            od * 6 * height * width +
            oh * 6 * width +
            ow * 6;

        acc_t channel_sum = acc_t(0);

        for (int64_t channel = warp; channel < channels; channel += WARPS) {
            const scalar_t* base = x + origin + channel * channel_stride;
            acc_t maximum = -static_cast<acc_t>(INFINITY);

            // Consecutive pooling windows of sizes 2 and 3 are
            // equivalent to one nonoverlapping 6x6x6 maximum.
            #pragma unroll
            for (int k = 0; k < 7; ++k) {
                const int p = lane + k * 32;
                if (p < 216) {
                    const int dz = p / 36;
                    const int dy = (p / 6) % 6;
                    const int dx = p % 6;
                    const acc_t value = static_cast<acc_t>(
                        base[dz * height * width + dy * width + dx]);
                    maximum = nan_max(maximum, value);
                }
            }

            #pragma unroll
            for (int offset = 16; offset > 0; offset >>= 1) {
                maximum = nan_max(
                    maximum,
                    __shfl_down_sync(0xffffffff, maximum, offset));
            }

            if (lane == 0) {
                channel_sum += maximum;
            }
        }

        if (lane == 0) {
            partial[warp] = channel_sum;
        }
        __syncthreads();

        if (warp == 0) {
            acc_t total = lane < WARPS ? partial[lane] : acc_t(0);
            #pragma unroll
            for (int offset = 16; offset > 0; offset >>= 1) {
                total += __shfl_down_sync(0xffffffff, total, offset);
            }
            if (lane == 0) {
                out[index] = static_cast<scalar_t>(total);
            }
        }
        __syncthreads();
    }
}

torch::Tensor fused_pool_sum_cuda(torch::Tensor x) {
    TORCH_CHECK(x.is_cuda(), "Expected a CUDA tensor");
    TORCH_CHECK(x.dim() == 5, "Expected an NCDHW tensor");
    TORCH_CHECK(x.is_contiguous(), "Expected a contiguous tensor");
    TORCH_CHECK(
        x.size(2) >= 6 && x.size(3) >= 6 && x.size(4) >= 6,
        "Spatial dimensions must be at least 6");

    const c10::cuda::CUDAGuard device_guard(x.device());

    const int64_t od = x.size(2) / 6;
    const int64_t oh = x.size(3) / 6;
    const int64_t ow = x.size(4) / 6;
    auto output = torch::empty({x.size(0), 1, od, oh, ow}, x.options());

    const int64_t count = output.numel();
    if (count == 0) {
        return output;
    }

    const int blocks = static_cast<int>(count < 65535 ? count : 65535);
    const cudaStream_t stream = at::cuda::getCurrentCUDAStream();

    AT_DISPATCH_FLOATING_TYPES_AND2(
        at::ScalarType::Half,
        at::ScalarType::BFloat16,
        x.scalar_type(),
        "fused_pool_sum_cuda",
        [&] {
            fused_pool_sum_kernel<scalar_t><<<blocks, 256, 0, stream>>>(
                x.data_ptr<scalar_t>(),
                output.data_ptr<scalar_t>(),
                x.size(1), x.size(2), x.size(3), x.size(4),
                od, oh, ow, count);
        });

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return output;
}
"""

_fused_ops = load_inline(
    name="fused_pool3d_2_3_channel_sum",
    cpp_sources=_cpp_source,
    cuda_sources=_cuda_source,
    functions=["fused_pool_sum_cuda"],
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
    verbose=False,
)


class ModelNew(nn.Module):
    def __init__(self, in_channels, out_channels, kernel_size, stride, padding):
        super().__init__()
        self.conv_transpose = nn.ConvTranspose3d(
            in_channels,
            out_channels,
            kernel_size,
            stride=stride,
            padding=padding,
        )

    def forward(self, x):
        x = self.conv_transpose(x)
        if not x.is_cuda:
            return F.max_pool3d(F.max_pool3d(x, 2), 3).sum(
                dim=1, keepdim=True
            )
        return _fused_ops.fused_pool_sum_cuda(x.contiguous())
```