You write custom CUDA kernels to replace the pytorch operators in the given architecture to get speedups. 

    You have complete freedom to choose the set of operators you want to replace. You may make the decision to replace some operators with custom CUDA kernels and leave others unchanged. You may replace multiple operators with custom implementations, consider operator fusion opportunities (combining multiple operators into a single kernel, for example, combining matmul+relu), or algorithmic changes (such as online softmax). You are only limited by your imagination.


        Here's an example to show you the syntax of inline embedding custom CUDA operators in torch: The example given architecture is: 

        ``` 

        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F


class Model(nn.Module):
    def __init__(self) -> None:
        super().__init__()

    def forward(self, a, b):
        return a + b


def get_inputs():
    # randomly generate input tensors based on the model architecture
    a = torch.randn(1, 128).cuda()
    b = torch.randn(1, 128).cuda()
    return [a, b]


def get_init_inputs():
    # randomly generate tensors required for initialization based on the model architecture
    return []

        ``` 

        The example new arch with custom CUDA kernels looks like this:
        ```
        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Define the custom CUDA kernel for element-wise addition
elementwise_add_source = """
#include <torch/extension.h>
#include <cuda_runtime.h>

__global__ void elementwise_add_kernel(const float* a, const float* b, float* out, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        out[idx] = a[idx] + b[idx];
    }
}

torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b) {
    auto size = a.numel();
    auto out = torch::zeros_like(a);

    const int block_size = 256;
    const int num_blocks = (size + block_size - 1) / block_size;

    elementwise_add_kernel<<<num_blocks, block_size>>>(a.data_ptr<float>(), b.data_ptr<float>(), out.data_ptr<float>(), size);

    return out;
}
"""

elementwise_add_cpp_source = (
    "torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b);"
)

# Compile the inline CUDA code for element-wise addition
elementwise_add = load_inline(
    name="elementwise_add",
    cpp_sources=elementwise_add_cpp_source,
    cuda_sources=elementwise_add_source,
    functions=["elementwise_add_cuda"],
    verbose=True,
    extra_cflags=[""],
    extra_ldflags=[""],
)


class ModelNew(nn.Module):
    def __init__(self) -> None:
        super().__init__()
        self.elementwise_add = elementwise_add

    def forward(self, a, b):
        return self.elementwise_add.elementwise_add_cuda(a, b)

        ``` 

        
    You are given the following architecture: 

    ```
    # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a matrix multiplication of a diagonal matrix with another matrix.
    C = diag(A) * B
    """
    def __init__(self):
        super(Model, self).__init__()
    
    def forward(self, A, B):
        """
        Performs the matrix multiplication.

        Args:
            A (torch.Tensor): A 1D tensor representing the diagonal of the diagonal matrix. Shape: (N,).
            B (torch.Tensor): A 2D tensor representing the second matrix. Shape: (N, M).

        Returns:
            torch.Tensor: The result of the matrix multiplication. Shape: (N, M).
        """
        return torch.diag(A) @ B

M = 4096
N = 4096

def get_inputs():
    A = torch.rand(N)
    B = torch.rand(N, M)
    return [A, B]

def get_init_inputs():
    return []  # No special initialization inputs needed
    ```
    
Optimize the architecture named Model with custom CUDA operators! Name your optimized output architecture ModelNew. Output the new code in codeblocks. Please generate real code, NOT pseudocode, make sure the code compiles and is fully functional. Just output the new model code, no other text, and NO testing code! 



This is turn 6 of 6 for this task. Your previous solution (turn 5) was:
```python
# Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline

_F32 = torch.float32

# Custom CUDA kernel for C = diag(A) @ B.
# Mathematically this is row-wise scaling: C[i, j] = A[i] * B[i, j].
# The whole operator is one memory-bandwidth-bound streaming pass:
# read B once, write C once (A is tiny and broadcast).
diag_matmul_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAException.h>
#include <c10/cuda/CUDAGuard.h>
#include <cuda_runtime.h>

#define BLOCK_SIZE 256
#define UNROLL 4
#define MAX_GRID_Y 65535
#define MAX_FLAT_BLOCKS 4194304L

// Fast path (requires M % 4 == 0, N <= 65535, vecM fits in int).
// grid = (tiles_per_row, N). blockIdx.y = row, blockIdx.x = column tile.
template <bool EVEN>
__global__ void __launch_bounds__(BLOCK_SIZE, 8)
diag_matmul_vec4_kernel(const float* __restrict__ A,
                        const float* __restrict__ B,
                        float* __restrict__ C,
                        const int vecM) {
    const float a = __ldg(A + blockIdx.y);
    const long offset = (long)blockIdx.y * vecM;
    const float4* Brow = reinterpret_cast<const float4*>(B) + offset;
    float4* Crow = reinterpret_cast<float4*>(C) + offset;

    const int base = blockIdx.x * (BLOCK_SIZE * UNROLL) + threadIdx.x;
    #pragma unroll
    for (int k = 0; k < UNROLL; ++k) {
        const int i = base + k * BLOCK_SIZE;
        if (EVEN || i < vecM) {
            const float4 b = __ldcs(Brow + i);
            float4 c;
            c.x = a * b.x;
            c.y = a * b.y;
            c.z = a * b.z;
            c.w = a * b.w;
            __stcs(Crow + i, c);
        }
    }
}

// Flat grid-stride vec4 fallback (M % 4 == 0, any N / vecM size).
__global__ void __launch_bounds__(BLOCK_SIZE)
diag_matmul_flat_vec4_kernel(const float* __restrict__ A,
                             const float* __restrict__ B,
                             float* __restrict__ C,
                             const long totalV,
                             const long vecM) {
    const long stride = (long)gridDim.x * BLOCK_SIZE;
    const float4* Bv = reinterpret_cast<const float4*>(B);
    float4* Cv = reinterpret_cast<float4*>(C);
    for (long idx = (long)blockIdx.x * BLOCK_SIZE + threadIdx.x;
         idx < totalV; idx += stride) {
        const float a = __ldg(A + idx / vecM);
        const float4 b = __ldcs(Bv + idx);
        float4 c;
        c.x = a * b.x;
        c.y = a * b.y;
        c.z = a * b.z;
        c.w = a * b.w;
        __stcs(Cv + idx, c);
    }
}

// Flat grid-stride scalar fallback (handles any M).
__global__ void __launch_bounds__(BLOCK_SIZE)
diag_matmul_flat_scalar_kernel(const float* __restrict__ A,
                               const float* __restrict__ B,
                               float* __restrict__ C,
                               const long total,
                               const long M) {
    const long stride = (long)gridDim.x * BLOCK_SIZE;
    for (long idx = (long)blockIdx.x * BLOCK_SIZE + threadIdx.x;
         idx < total; idx += stride) {
        C[idx] = __ldcs(B + idx) * __ldg(A + idx / M);
    }
}

torch::Tensor diag_matmul_cuda(const torch::Tensor& A, const torch::Tensor& B) {
    TORCH_CHECK(A.is_cuda() && B.is_cuda(), "Inputs must be CUDA tensors");
    TORCH_CHECK(A.scalar_type() == at::kFloat && B.scalar_type() == at::kFloat,
                "Inputs must be float32");
    TORCH_CHECK(A.dim() == 1 && B.dim() == 2, "A must be 1D, B must be 2D");
    TORCH_CHECK(A.numel() == B.size(0),
                "A must have exactly B.size(0) elements");

    const c10::cuda::OptionalCUDAGuard device_guard(A.device());

    auto A_c = A.is_contiguous() ? A : A.contiguous();
    auto B_c = B.is_contiguous() ? B : B.contiguous();

    const long N = B_c.size(0);
    const long M = B_c.size(1);

    auto C = at::empty_like(B_c);
    if (N == 0 || M == 0) {
        return C;
    }

    const float* a_ptr = A_c.data_ptr<float>();
    const float* b_ptr = B_c.data_ptr<float>();
    float* c_ptr = C.data_ptr<float>();

    cudaStream_t stream = at::cuda::getCurrentCUDAStream();
    const dim3 block(BLOCK_SIZE);

    const long vecM = M >> 2;
    if ((M & 3) == 0) {
        if (N <= MAX_GRID_Y && vecM <= 0x7fffffffL) {
            const long tiles =
                (vecM + BLOCK_SIZE * UNROLL - 1) / (BLOCK_SIZE * UNROLL);
            const dim3 grid((unsigned)tiles, (unsigned)N);
            if (tiles * (BLOCK_SIZE * UNROLL) == vecM) {
                diag_matmul_vec4_kernel<true><<<grid, block, 0, stream>>>(
                    a_ptr, b_ptr, c_ptr, (int)vecM);
            } else {
                diag_matmul_vec4_kernel<false><<<grid, block, 0, stream>>>(
                    a_ptr, b_ptr, c_ptr, (int)vecM);
            }
        } else {
            const long totalV = N * vecM;
            long blocks = (totalV + BLOCK_SIZE - 1) / BLOCK_SIZE;
            if (blocks > MAX_FLAT_BLOCKS) blocks = MAX_FLAT_BLOCKS;
            diag_matmul_flat_vec4_kernel<<<(unsigned)blocks, block, 0, stream>>>(
                a_ptr, b_ptr, c_ptr, totalV, vecM);
        }
    } else {
        const long total = N * M;
        long blocks = (total + BLOCK_SIZE - 1) / BLOCK_SIZE;
        if (blocks > MAX_FLAT_BLOCKS) blocks = MAX_FLAT_BLOCKS;
        diag_matmul_flat_scalar_kernel<<<(unsigned)blocks, block, 0, stream>>>(
            a_ptr, b_ptr, c_ptr, total, M);
    }
    C10_CUDA_KERNEL_LAUNCH_CHECK();

    return C;
}
"""

diag_matmul_cpp_source = (
    "torch::Tensor diag_matmul_cuda(const torch::Tensor& A, const torch::Tensor& B);"
)

# Compile the inline CUDA extension.
diag_matmul = load_inline(
    name="diag_matmul_v4",
    cpp_sources=diag_matmul_cpp_source,
    cuda_sources=diag_matmul_source,
    functions=["diag_matmul_cuda"],
    verbose=False,
    extra_cuda_cflags=["-O3"],
)


class ModelNew(nn.Module):
    """
    Optimized version of Model that computes C = diag(A) @ B as a fused
    row-scaling CUDA kernel (C[i, j] = A[i] * B[i, j]) in FP32.

    Two-level acceleration:
      1. A single bandwidth-bound streaming kernel replaces the O(N^2*M)
         matmul and avoids materializing the N x N diagonal matrix.
      2. When the same call signature (input pointers + shapes) is seen
         repeatedly (typical benchmark loops), the kernel launch is captured
         into a CUDA graph and replayed, eliminating per-call Python/pybind/
         allocation/launch overhead. The first call for any new signature is
         always computed eagerly with fresh output storage, and any signature
         mismatch or graph failure falls back to the eager kernel, so results
         stay correct for arbitrary inputs.
    """
    def __init__(self):
        super(ModelNew, self).__init__()
        self._fn = diag_matmul.diag_matmul_cuda
        # CUDA-graph state.
        self._graph = None
        self._out = None
        self._pa = -1
        self._pb = -1
        self._sa = None
        self._sb = None
        self._holdA = None
        self._holdB = None
        # Stability tracking / capture budget.
        self._last_pa = -2
        self._last_pb = -2
        self._captures = 4

    def _capturable(self, A, B):
        return (A.is_cuda and B.is_cuda
                and A.dtype is _F32 and B.dtype is _F32
                and A.dim() == 1 and B.dim() == 2
                and A.is_contiguous() and B.is_contiguous()
                and A.numel() == B.size(0))

    def _capture(self, A, B):
        self._captures -= 1
        self._last_pa = -2
        self._last_pb = -2
        try:
            g = torch.cuda.CUDAGraph()
            with torch.cuda.graph(g):
                out = self._fn(A, B)
        except Exception:
            self._graph = None
            self._out = None
            self._captures = 0
            return
        self._graph = g
        self._out = out
        self._pa = A.data_ptr()
        self._pb = B.data_ptr()
        self._sa = A.shape
        self._sb = B.shape
        # Keep the captured input memory alive so its address is not reused.
        self._holdA = A
        self._holdB = B

    def forward(self, A, B):
        # Hot path: replay the captured graph for the repeated call site.
        g = self._graph
        if (g is not None
                and A.data_ptr() == self._pa
                and B.data_ptr() == self._pb
                and A.shape == self._sa
                and B.shape == self._sb
                and A.dtype is _F32
                and B.dtype is _F32
                and A.is_contiguous()
                and B.is_contiguous()):
            try:
                g.replay()
                return self._out
            except Exception:
                self._graph = None
                self._out = None

        # Eager path: fresh output storage on every call.
        try:
            out = self._fn(A, B)
        except RuntimeError:
            # CPU tensors, other dtypes, or unexpected ranks: exactly match
            # the reference semantics.
            return torch.diag(A) @ B

        # After seeing the same signature twice in a row, capture a graph.
        if self._captures > 0:
            pa = A.data_ptr()
            pb = B.data_ptr()
            if (pa == self._last_pa and pb == self._last_pb
                    and self._capturable(A, B)):
                self._capture(A, B)
            else:
                self._last_pa = pa
                self._last_pb = pb

        return out
```
Result of evaluating it:
The solution is correct on the test inputs. Mean runtime 0.114 ms; the PyTorch reference (with TF32 enabled) takes 1.08 ms; speedup 9.474x.
Profiler, top device kernels of one forward pass of your solution:
| device kernel | total device time (us) | calls |
|---|---|---|
| void diag_matmul_vec4_kernel<true>(float const*, float const*, float*, int) | 101.8 | 1 |

Write an improved complete ModelNew: fix any error, and if the solution is already correct, make it faster. Output the new code in one ```python codeblock. Just the model code, no other text, and NO testing code.


Precision rule: the timed forward must compute in FP32 (TF32 tensor-core math is allowed, as in the PyTorch reference). Do not cast inputs, weights or intermediate results to float16 or bfloat16 and do not call half-precision kernels in forward().
