You write custom CUDA kernels to replace the pytorch operators in the given architecture to get speedups. 

    You have complete freedom to choose the set of operators you want to replace. You may make the decision to replace some operators with custom CUDA kernels and leave others unchanged. You may replace multiple operators with custom implementations, consider operator fusion opportunities (combining multiple operators into a single kernel, for example, combining matmul+relu), or algorithmic changes (such as online softmax). You are only limited by your imagination.


        Here's an example to show you the syntax of inline embedding custom CUDA operators in torch: The example given architecture is: 

        ``` 

        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F


class Model(nn.Module):
    def __init__(self) -> None:
        super().__init__()

    def forward(self, a, b):
        return a + b


def get_inputs():
    # randomly generate input tensors based on the model architecture
    a = torch.randn(1, 128).cuda()
    b = torch.randn(1, 128).cuda()
    return [a, b]


def get_init_inputs():
    # randomly generate tensors required for initialization based on the model architecture
    return []

        ``` 

        The example new arch with custom CUDA kernels looks like this:
        ```
        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Define the custom CUDA kernel for element-wise addition
elementwise_add_source = """
#include <torch/extension.h>
#include <cuda_runtime.h>

__global__ void elementwise_add_kernel(const float* a, const float* b, float* out, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        out[idx] = a[idx] + b[idx];
    }
}

torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b) {
    auto size = a.numel();
    auto out = torch::zeros_like(a);

    const int block_size = 256;
    const int num_blocks = (size + block_size - 1) / block_size;

    elementwise_add_kernel<<<num_blocks, block_size>>>(a.data_ptr<float>(), b.data_ptr<float>(), out.data_ptr<float>(), size);

    return out;
}
"""

elementwise_add_cpp_source = (
    "torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b);"
)

# Compile the inline CUDA code for element-wise addition
elementwise_add = load_inline(
    name="elementwise_add",
    cpp_sources=elementwise_add_cpp_source,
    cuda_sources=elementwise_add_source,
    functions=["elementwise_add_cuda"],
    verbose=True,
    extra_cflags=[""],
    extra_ldflags=[""],
)


class ModelNew(nn.Module):
    def __init__(self) -> None:
        super().__init__()
        self.elementwise_add = elementwise_add

    def forward(self, a, b):
        return self.elementwise_add.elementwise_add_cuda(a, b)

        ``` 

        
    You are given the following architecture: 

    ```
    # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a matrix-scalar multiplication (C = A * s)
    """
    def __init__(self):
        super(Model, self).__init__()
    
    def forward(self, A: torch.Tensor, s: float) -> torch.Tensor:
        """
        Performs matrix-scalar multiplication.

        Args:
            A: Input matrix of shape (M, N)
            s: Scalar value

        Returns:
            C: Resulting matrix of shape (M, N)
        """
        return A * s

M = 16384 * 4
N = 4096 * 4

def get_inputs():
    A = torch.rand(M, N)
    s = 3.14
    return [A, s]

def get_init_inputs():
    return []  # No special initialization inputs needed
    ```
    
Optimize the architecture named Model with custom CUDA operators! Name your optimized output architecture ModelNew. Output the new code in codeblocks. Please generate real code, NOT pseudocode, make sure the code compiles and is fully functional. Just output the new model code, no other text, and NO testing code! 



This is turn 3 of 6 for this task. Your previous solution (turn 2) was:
```python
# Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline

# Custom CUDA kernel for matrix-scalar multiplication (C = A * s).
# The operation is memory-bandwidth bound, so the kernel is optimized for
# maximum memory throughput:
#   * vectorized 128-bit (float4) loads/stores
#   * streaming cache hints (__ldcs / __stcs) to avoid L2 thrashing
#   * grid-stride loop sized to a few waves of the SM count
scalar_mul_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <cstdint>

// Vectorized kernel: each thread processes one float4 (4 elements) per step.
__global__ void scalar_mul_vec4_kernel(const float4* __restrict__ A,
                                       float4* __restrict__ C,
                                       const float s,
                                       const long n4) {
    const long stride = (long)gridDim.x * blockDim.x;
    for (long idx = (long)blockIdx.x * blockDim.x + threadIdx.x; idx < n4; idx += stride) {
        float4 v = __ldcs(A + idx);
        v.x *= s;
        v.y *= s;
        v.z *= s;
        v.w *= s;
        __stcs(C + idx, v);
    }
}

// Scalar fallback kernel for unaligned or non-multiple-of-4 tensors.
__global__ void scalar_mul_kernel(const float* __restrict__ A,
                                  float* __restrict__ C,
                                  const float s,
                                  const long n) {
    const long stride = (long)gridDim.x * blockDim.x;
    for (long idx = (long)blockIdx.x * blockDim.x + threadIdx.x; idx < n; idx += stride) {
        C[idx] = A[idx] * s;
    }
}

static inline int num_sms() {
    static int sms = -1;
    if (sms < 0) {
        int dev = 0;
        cudaGetDevice(&dev);
        cudaDeviceGetAttribute(&sms, cudaDevAttrMultiProcessorCount, dev);
        if (sms <= 0) sms = 1;
    }
    return sms;
}

torch::Tensor scalar_mul_cuda(torch::Tensor A, double s) {
    TORCH_CHECK(A.is_cuda(), "Input A must be a CUDA tensor");
    TORCH_CHECK(A.scalar_type() == at::kFloat, "Input A must be float32");

    auto A_contig = A.contiguous();
    auto C = torch::empty_like(A_contig);

    const long n = (long)A_contig.numel();
    if (n == 0) {
        return C;
    }

    const float* a_ptr = A_contig.data_ptr<float>();
    float* c_ptr = C.data_ptr<float>();
    const float sf = static_cast<float>(s);

    const int block_size = 256;
    // Cap the grid: a few waves per SM is enough to saturate memory bandwidth.
    const long max_grid = (long)num_sms() * 32;

    cudaStream_t stream = at::cuda::getCurrentCUDAStream();

    const bool aligned = (reinterpret_cast<uintptr_t>(a_ptr) % 16 == 0) &&
                         (reinterpret_cast<uintptr_t>(c_ptr) % 16 == 0);

    if (aligned && (n % 4 == 0)) {
        const long n4 = n >> 2;
        long blocks = (n4 + block_size - 1) / block_size;
        if (blocks > max_grid) blocks = max_grid;
        scalar_mul_vec4_kernel<<<(unsigned int)blocks, block_size, 0, stream>>>(
            reinterpret_cast<const float4*>(a_ptr),
            reinterpret_cast<float4*>(c_ptr),
            sf, n4);
    } else {
        long blocks = (n + block_size - 1) / block_size;
        if (blocks > max_grid) blocks = max_grid;
        scalar_mul_kernel<<<(unsigned int)blocks, block_size, 0, stream>>>(
            a_ptr, c_ptr, sf, n);
    }

    C10_CUDA_KERNEL_LAUNCH_CHECK();

    return C;
}
"""

scalar_mul_cpp_source = "torch::Tensor scalar_mul_cuda(torch::Tensor A, double s);"

# Compile the inline CUDA extension
scalar_mul_ext = load_inline(
    name="scalar_mul_ext",
    cpp_sources=scalar_mul_cpp_source,
    cuda_sources=scalar_mul_cuda_source,
    functions=["scalar_mul_cuda"],
    verbose=False,
    extra_cuda_cflags=["-O3", "--use_fast_math"],
)


class ModelNew(nn.Module):
    """
    Optimized model that performs a matrix-scalar multiplication (C = A * s)
    using a custom vectorized CUDA kernel.
    """
    def __init__(self):
        super(ModelNew, self).__init__()
        self._scalar_mul = scalar_mul_ext

    def forward(self, A: torch.Tensor, s: float) -> torch.Tensor:
        if A.is_cuda and A.dtype == torch.float32:
            return self._scalar_mul.scalar_mul_cuda(A, float(s))
        # Fallback for CPU tensors or other dtypes
        return A * s
```
Result of evaluating it:
The solution is correct on the test inputs. Mean runtime 6.52 ms; the PyTorch reference (with TF32 enabled) takes 6.24 ms; speedup 0.957x.
Profiler, top device kernels of one forward pass of your solution:
| device kernel | total device time (us) | calls |
|---|---|---|
| scalar_mul_vec4_kernel(float4 const*, float4*, float, long) | 6286.5 | 1 |

Write an improved complete ModelNew: fix any error, and if the solution is already correct, make it faster. Output the new code in one ```python codeblock. Just the model code, no other text, and NO testing code.
