You write custom CUDA kernels to replace the pytorch operators in the given architecture to get speedups. 

    You have complete freedom to choose the set of operators you want to replace. You may make the decision to replace some operators with custom CUDA kernels and leave others unchanged. You may replace multiple operators with custom implementations, consider operator fusion opportunities (combining multiple operators into a single kernel, for example, combining matmul+relu), or algorithmic changes (such as online softmax). You are only limited by your imagination.


        Here's an example to show you the syntax of inline embedding custom CUDA operators in torch: The example given architecture is: 

        ``` 

        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F


class Model(nn.Module):
    def __init__(self) -> None:
        super().__init__()

    def forward(self, a, b):
        return a + b


def get_inputs():
    # randomly generate input tensors based on the model architecture
    a = torch.randn(1, 128).cuda()
    b = torch.randn(1, 128).cuda()
    return [a, b]


def get_init_inputs():
    # randomly generate tensors required for initialization based on the model architecture
    return []

        ``` 

        The example new arch with custom CUDA kernels looks like this:
        ```
        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Define the custom CUDA kernel for element-wise addition
elementwise_add_source = """
#include <torch/extension.h>
#include <cuda_runtime.h>

__global__ void elementwise_add_kernel(const float* a, const float* b, float* out, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        out[idx] = a[idx] + b[idx];
    }
}

torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b) {
    auto size = a.numel();
    auto out = torch::zeros_like(a);

    const int block_size = 256;
    const int num_blocks = (size + block_size - 1) / block_size;

    elementwise_add_kernel<<<num_blocks, block_size>>>(a.data_ptr<float>(), b.data_ptr<float>(), out.data_ptr<float>(), size);

    return out;
}
"""

elementwise_add_cpp_source = (
    "torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b);"
)

# Compile the inline CUDA code for element-wise addition
elementwise_add = load_inline(
    name="elementwise_add",
    cpp_sources=elementwise_add_cpp_source,
    cuda_sources=elementwise_add_source,
    functions=["elementwise_add_cuda"],
    verbose=True,
    extra_cflags=[""],
    extra_ldflags=[""],
)


class ModelNew(nn.Module):
    def __init__(self) -> None:
        super().__init__()
        self.elementwise_add = elementwise_add

    def forward(self, a, b):
        return self.elementwise_add.elementwise_add_cuda(a, b)

        ``` 

        
    You are given the following architecture: 

    ```
    # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a matrix-scalar multiplication (C = A * s)
    """
    def __init__(self):
        super(Model, self).__init__()
    
    def forward(self, A: torch.Tensor, s: float) -> torch.Tensor:
        """
        Performs matrix-scalar multiplication.

        Args:
            A: Input matrix of shape (M, N)
            s: Scalar value

        Returns:
            C: Resulting matrix of shape (M, N)
        """
        return A * s

M = 16384 * 4
N = 4096 * 4

def get_inputs():
    A = torch.rand(M, N)
    s = 3.14
    return [A, s]

def get_init_inputs():
    return []  # No special initialization inputs needed
    ```
    
Optimize the architecture named Model with custom CUDA operators! Name your optimized output architecture ModelNew. Output the new code in codeblocks. Please generate real code, NOT pseudocode, make sure the code compiles and is fully functional. Just output the new model code, no other text, and NO testing code! 



This is turn 6 of 6 for this task. Your previous solution (turn 5) was:
```python
# Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline

# Custom CUDA kernel for matrix-scalar multiplication (C = A * s).
#
# This operator is purely memory-bandwidth bound (read 4 GiB, write 4 GiB),
# so this revision focuses on maximizing effective DRAM throughput:
#   * 128-bit vectorized accesses (float4) with __ldcs/__stcs streaming cache
#     hints. Since every byte is touched exactly once, marking the lines
#     "evict first" keeps the input stream from polluting L2 and lets dirty
#     output lines drain to DRAM earlier, improving copy-style bandwidth.
#   * 32-bit indexing on the hot path (numel < 2^31) to cut register pressure
#     and keep full occupancy (2048 threads/SM).
#   * a dedicated "uniform" kernel used when the element count is an exact
#     multiple of the block tile: zero bounds checks, 4 independent 16-byte
#     loads in flight per thread for deep memory-level parallelism.
#   * minimal host-side work (single branch, no TensorIterator dispatch).
scalar_mul_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <cstdint>
#include <climits>

namespace {

constexpr int kThreads = 256;
constexpr int kUnroll  = 4;
constexpr int kTile    = kThreads * kUnroll;   // float4 elements per block

// Hot path: n4 is an exact multiple of kTile -> no bounds checks at all,
// 4 outstanding 16B streaming loads per thread, 32-bit index math.
__global__ void __launch_bounds__(kThreads)
scalar_mul_vec4_uniform_kernel(const float4* __restrict__ A,
                               float4* __restrict__ C,
                               const float s) {
    const int base = (int)blockIdx.x * kTile + (int)threadIdx.x;

    float4 v[kUnroll];
    #pragma unroll
    for (int i = 0; i < kUnroll; ++i) {
        v[i] = __ldcs(&A[base + i * kThreads]);
    }
    #pragma unroll
    for (int i = 0; i < kUnroll; ++i) {
        v[i].x *= s;
        v[i].y *= s;
        v[i].z *= s;
        v[i].w *= s;
    }
    #pragma unroll
    for (int i = 0; i < kUnroll; ++i) {
        __stcs(&C[base + i * kThreads], v[i]);
    }
}

// Generic vectorized path: one float4 per thread with a single bounds check.
__global__ void __launch_bounds__(kThreads)
scalar_mul_vec4_kernel(const float4* __restrict__ A,
                       float4* __restrict__ C,
                       const float s,
                       const int n4) {
    const int idx = (int)blockIdx.x * kThreads + (int)threadIdx.x;
    if (idx < n4) {
        float4 v = __ldcs(&A[idx]);
        v.x *= s;
        v.y *= s;
        v.z *= s;
        v.w *= s;
        __stcs(&C[idx], v);
    }
}

// Scalar grid-stride fallback (unaligned pointers / odd sizes / huge tensors).
__global__ void scalar_mul_fallback_kernel(const float* __restrict__ A,
                                           float* __restrict__ C,
                                           const float s,
                                           const long n) {
    const long stride = (long)gridDim.x * blockDim.x;
    for (long idx = (long)blockIdx.x * blockDim.x + threadIdx.x; idx < n; idx += stride) {
        C[idx] = A[idx] * s;
    }
}

}  // namespace

torch::Tensor scalar_mul_cuda(torch::Tensor A, double s) {
    if (!A.is_cuda() || A.scalar_type() != at::kFloat) {
        return at::mul(A, at::Scalar(s));
    }

    auto Ac = A.is_contiguous() ? A : A.contiguous();
    auto C  = at::empty(Ac.sizes(), Ac.options());

    const long n = (long)Ac.numel();
    if (n == 0) {
        return C;
    }

    const float* a_ptr = Ac.data_ptr<float>();
    float*       c_ptr = C.data_ptr<float>();
    const float  sf    = static_cast<float>(s);

    cudaStream_t stream = at::cuda::getCurrentCUDAStream();

    const bool aligned =
        ((((uintptr_t)a_ptr) | ((uintptr_t)c_ptr)) & 0xF) == 0;
    const long n4 = n >> 2;

    if (aligned && (n & 3) == 0 && n4 <= (long)INT_MAX) {
        if ((n4 % kTile) == 0) {
            const int blocks = (int)(n4 / kTile);
            scalar_mul_vec4_uniform_kernel<<<blocks, kThreads, 0, stream>>>(
                reinterpret_cast<const float4*>(a_ptr),
                reinterpret_cast<float4*>(c_ptr),
                sf);
        } else {
            const int blocks = (int)((n4 + kThreads - 1) / kThreads);
            scalar_mul_vec4_kernel<<<blocks, kThreads, 0, stream>>>(
                reinterpret_cast<const float4*>(a_ptr),
                reinterpret_cast<float4*>(c_ptr),
                sf, (int)n4);
        }
    } else {
        long blocks = (n + kThreads - 1) / kThreads;
        const long cap = 1L << 20;
        if (blocks > cap) blocks = cap;
        scalar_mul_fallback_kernel<<<(unsigned int)blocks, kThreads, 0, stream>>>(
            a_ptr, c_ptr, sf, n);
    }
    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return C;
}
"""

scalar_mul_cpp_source = "torch::Tensor scalar_mul_cuda(torch::Tensor A, double s);"

# Compile the inline CUDA extension
scalar_mul_ext = load_inline(
    name="scalar_mul_ext_v5",
    cpp_sources=scalar_mul_cpp_source,
    cuda_sources=scalar_mul_cuda_source,
    functions=["scalar_mul_cuda"],
    verbose=False,
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
)


class ModelNew(nn.Module):
    """
    Optimized model that performs a matrix-scalar multiplication (C = A * s)
    using a custom, vectorized, streaming-cache-hint CUDA kernel tuned for
    maximum memory bandwidth.
    """
    def __init__(self):
        super(ModelNew, self).__init__()
        self._scalar_mul = scalar_mul_ext.scalar_mul_cuda

    def forward(self, A: torch.Tensor, s: float) -> torch.Tensor:
        return self._scalar_mul(A, s)
```
Result of evaluating it:
The solution is correct on the test inputs. Mean runtime 6.36 ms; the PyTorch reference (with TF32 enabled) takes 6.24 ms; speedup 0.981x.
Profiler, top device kernels of one forward pass of your solution:
| device kernel | total device time (us) | calls |
|---|---|---|
| (anonymous namespace)::scalar_mul_vec4_uniform_kernel(float4 const*, float4*, float) | 6168.2 | 1 |

The fastest correct solution so far (1.002x speedup) is:
```python
# Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline

# Custom CUDA kernel for matrix-scalar multiplication (C = A * s).
#
# This operator is purely memory-bandwidth bound (read 4 GiB, write 4 GiB),
# so this version is tuned to match/beat the fastest known streaming kernels:
#   * 128-bit vectorized loads/stores (float4), plain ld/st (no cache hints
#     that can perturb the L2 write stream)
#   * 32-bit indexing on the hot path (numel < 2^31) to cut register pressure
#     and reach full occupancy (2048 threads/SM)
#   * a dedicated "uniform" kernel used when the element count is an exact
#     multiple of the block tile: zero bounds checks, 4 independent 16-byte
#     loads in flight per thread for deep memory-level parallelism
#   * minimal host-side work (single branch, no TensorIterator dispatch)
scalar_mul_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <cstdint>
#include <climits>

namespace {

constexpr int kThreads = 256;
constexpr int kUnroll  = 4;
constexpr int kTile    = kThreads * kUnroll;   // float4 elements per block

// Hot path: n4 is an exact multiple of kTile -> no bounds checks at all,
// 4 outstanding 16B loads per thread, 32-bit index math.
__global__ void __launch_bounds__(kThreads)
scalar_mul_vec4_uniform_kernel(const float4* __restrict__ A,
                               float4* __restrict__ C,
                               const float s) {
    const int base = (int)blockIdx.x * kTile + (int)threadIdx.x;

    float4 v[kUnroll];
    #pragma unroll
    for (int i = 0; i < kUnroll; ++i) {
        v[i] = A[base + i * kThreads];
    }
    #pragma unroll
    for (int i = 0; i < kUnroll; ++i) {
        v[i].x *= s;
        v[i].y *= s;
        v[i].z *= s;
        v[i].w *= s;
    }
    #pragma unroll
    for (int i = 0; i < kUnroll; ++i) {
        C[base + i * kThreads] = v[i];
    }
}

// Generic vectorized path: one float4 per thread with a single bounds check.
__global__ void __launch_bounds__(kThreads)
scalar_mul_vec4_kernel(const float4* __restrict__ A,
                       float4* __restrict__ C,
                       const float s,
                       const int n4) {
    const int idx = (int)blockIdx.x * kThreads + (int)threadIdx.x;
    if (idx < n4) {
        float4 v = A[idx];
        v.x *= s;
        v.y *= s;
        v.z *= s;
        v.w *= s;
        C[idx] = v;
    }
}

// Scalar grid-stride fallback (unaligned pointers / odd sizes / huge tensors).
__global__ void scalar_mul_fallback_kernel(const float* __restrict__ A,
                                           float* __restrict__ C,
                                           const float s,
                                           const long n) {
    const long stride = (long)gridDim.x * blockDim.x;
    for (long idx = (long)blockIdx.x * blockDim.x + threadIdx.x; idx < n; idx += stride) {
        C[idx] = A[idx] * s;
    }
}

}  // namespace

torch::Tensor scalar_mul_cuda(torch::Tensor A, double s) {
    if (!A.is_cuda() || A.scalar_type() != at::kFloat) {
        return at::mul(A, at::Scalar(s));
    }

    auto Ac = A.is_contiguous() ? A : A.contiguous();
    auto C  = at::empty(Ac.sizes(), Ac.options());

    const long n = (long)Ac.numel();
    if (n == 0) {
        return C;
    }

    const float* a_ptr = Ac.data_ptr<float>();
    float*       c_ptr = C.data_ptr<float>();
    const float  sf    = static_cast<float>(s);

    cudaStream_t stream = at::cuda::getCurrentCUDAStream();

    const bool aligned =
        ((((uintptr_t)a_ptr) | ((uintptr_t)c_ptr)) & 0xF) == 0;
    const long n4 = n >> 2;

    if (aligned && (n & 3) == 0 && n4 <= (long)INT_MAX) {
        if ((n4 % kTile) == 0) {
            const int blocks = (int)(n4 / kTile);
            scalar_mul_vec4_uniform_kernel<<<blocks, kThreads, 0, stream>>>(
                reinterpret_cast<const float4*>(a_ptr),
                reinterpret_cast<float4*>(c_ptr),
                sf);
        } else {
            const int blocks = (int)((n4 + kThreads - 1) / kThreads);
            scalar_mul_vec4_kernel<<<blocks, kThreads, 0, stream>>>(
                reinterpret_cast<const float4*>(a_ptr),
                reinterpret_cast<float4*>(c_ptr),
                sf, (int)n4);
        }
    } else {
        long blocks = (n + kThreads - 1) / kThreads;
        const long cap = 1L << 20;
        if (blocks > cap) blocks = cap;
        scalar_mul_fallback_kernel<<<(unsigned int)blocks, kThreads, 0, stream>>>(
            a_ptr, c_ptr, sf, n);
    }
    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return C;
}
"""

scalar_mul_cpp_source = "torch::Tensor scalar_mul_cuda(torch::Tensor A, double s);"

# Compile the inline CUDA extension
scalar_mul_ext = load_inline(
    name="scalar_mul_ext_v4",
    cpp_sources=scalar_mul_cpp_source,
    cuda_sources=scalar_mul_cuda_source,
    functions=["scalar_mul_cuda"],
    verbose=False,
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
)


class ModelNew(nn.Module):
    """
    Optimized model that performs a matrix-scalar multiplication (C = A * s)
    using a custom, vectorized, bandwidth-maximizing CUDA kernel.
    """
    def __init__(self):
        super(ModelNew, self).__init__()
        self._scalar_mul = scalar_mul_ext.scalar_mul_cuda

    def forward(self, A: torch.Tensor, s: float) -> torch.Tensor:
        return self._scalar_mul(A, s)
```

Write an improved complete ModelNew: fix any error, and if the solution is already correct, make it faster. Output the new code in one ```python codeblock. Just the model code, no other text, and NO testing code.
