You write custom CUDA kernels to replace the pytorch operators in the given architecture to get speedups. 

    You have complete freedom to choose the set of operators you want to replace. You may make the decision to replace some operators with custom CUDA kernels and leave others unchanged. You may replace multiple operators with custom implementations, consider operator fusion opportunities (combining multiple operators into a single kernel, for example, combining matmul+relu), or algorithmic changes (such as online softmax). You are only limited by your imagination.


        Here's an example to show you the syntax of inline embedding custom CUDA operators in torch: The example given architecture is: 

        ``` 

        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F


class Model(nn.Module):
    def __init__(self) -> None:
        super().__init__()

    def forward(self, a, b):
        return a + b


def get_inputs():
    # randomly generate input tensors based on the model architecture
    a = torch.randn(1, 128).cuda()
    b = torch.randn(1, 128).cuda()
    return [a, b]


def get_init_inputs():
    # randomly generate tensors required for initialization based on the model architecture
    return []

        ``` 

        The example new arch with custom CUDA kernels looks like this:
        ```
        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Define the custom CUDA kernel for element-wise addition
elementwise_add_source = """
#include <torch/extension.h>
#include <cuda_runtime.h>

__global__ void elementwise_add_kernel(const float* a, const float* b, float* out, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        out[idx] = a[idx] + b[idx];
    }
}

torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b) {
    auto size = a.numel();
    auto out = torch::zeros_like(a);

    const int block_size = 256;
    const int num_blocks = (size + block_size - 1) / block_size;

    elementwise_add_kernel<<<num_blocks, block_size>>>(a.data_ptr<float>(), b.data_ptr<float>(), out.data_ptr<float>(), size);

    return out;
}
"""

elementwise_add_cpp_source = (
    "torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b);"
)

# Compile the inline CUDA code for element-wise addition
elementwise_add = load_inline(
    name="elementwise_add",
    cpp_sources=elementwise_add_cpp_source,
    cuda_sources=elementwise_add_source,
    functions=["elementwise_add_cuda"],
    verbose=True,
    extra_cflags=[""],
    extra_ldflags=[""],
)


class ModelNew(nn.Module):
    def __init__(self) -> None:
        super().__init__()
        self.elementwise_add = elementwise_add

    def forward(self, a, b):
        return self.elementwise_add.elementwise_add_cuda(a, b)

        ``` 

        
    You are given the following architecture: 

    ```
    # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    A 3D convolutional transpose layer followed by Batch Normalization and subtraction.
    """
    def __init__(self, in_channels, out_channels, kernel_size, stride, padding, bias=True):
        super(Model, self).__init__()
        self.conv_transpose = nn.ConvTranspose3d(in_channels, out_channels, kernel_size, stride=stride, padding=padding, bias=bias)
        self.batch_norm = nn.BatchNorm3d(out_channels)

    def forward(self, x):
        x = self.conv_transpose(x)
        x = self.batch_norm(x)
        x = x - torch.mean(x, dim=(2, 3, 4), keepdim=True)  # Subtract mean along spatial dimensions
        return x

batch_size = 16
in_channels = 16
out_channels = 32
depth, height, width = 16, 32, 32
kernel_size = 3
stride = 2
padding = 1

def get_inputs():
    return [torch.rand(batch_size, in_channels, depth, height, width)]

def get_init_inputs():
    return [in_channels, out_channels, kernel_size, stride, padding]
    ```
    
Optimize the architecture named Model with custom CUDA operators! Name your optimized output architecture ModelNew. Output the new code in codeblocks. Please generate real code, NOT pseudocode, make sure the code compiles and is fully functional. Just output the new model code, no other text, and NO testing code! 



This is turn 3 of 6 for this task. Your previous solution (turn 2) was:
```python
# Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

torch.backends.cudnn.benchmark = True

_fused_cpp_source = """
torch::Tensor fused_bn_meansub(torch::Tensor x, torch::Tensor gamma,
                               torch::Tensor running_mean, torch::Tensor running_var,
                               double eps, double momentum, bool use_batch_stats, bool update_running);
"""

_fused_cuda_source = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <cuda_runtime.h>

#define BLOCK_SIZE 256
#define ITEMS_PER_THREAD 4

// Key math: BN(x) = a[c]*x + b[c], and the final op subtracts the per-(n,c)
// spatial mean, so the additive term b[c] cancels exactly:
//   out[n,c,i] = a[c] * (x[n,c,i] - mean_i(x[n,c,:]))
// where a[c] = gamma[c]/sqrt(var[c]+eps) (batch var in train mode, running
// var in eval mode). Likewise the conv bias cancels, so it is skipped.

__global__ void spatial_reduce_kernel(const float* __restrict__ x,
                                      float* __restrict__ sums,
                                      float* __restrict__ sumsq,
                                      const int S) {
    const int seg = blockIdx.y;  // n*C + c
    const long segStart = (long)seg * (long)S;
    const long segEnd = segStart + (long)S;
    long idx = segStart + (long)blockIdx.x * (BLOCK_SIZE * ITEMS_PER_THREAD) + threadIdx.x;

    float acc = 0.0f;
    float acc2 = 0.0f;
#pragma unroll
    for (int k = 0; k < ITEMS_PER_THREAD; ++k) {
        if (idx < segEnd) {
            float v = x[idx];
            acc += v;
            acc2 += v * v;
        }
        idx += BLOCK_SIZE;
    }

    __shared__ float sh_sum[BLOCK_SIZE];
    __shared__ float sh_sumsq[BLOCK_SIZE];
    sh_sum[threadIdx.x] = acc;
    sh_sumsq[threadIdx.x] = acc2;
    __syncthreads();

    for (int offset = BLOCK_SIZE / 2; offset > 0; offset >>= 1) {
        if (threadIdx.x < offset) {
            sh_sum[threadIdx.x] += sh_sum[threadIdx.x + offset];
            sh_sumsq[threadIdx.x] += sh_sumsq[threadIdx.x + offset];
        }
        __syncthreads();
    }

    if (threadIdx.x == 0) {
        atomicAdd(&sums[seg], sh_sum[0]);
        atomicAdd(&sumsq[seg], sh_sumsq[0]);
    }
}

__global__ void channel_params_kernel(const float* __restrict__ sums,
                                      const float* __restrict__ sumsq,
                                      const float* __restrict__ gamma,
                                      float* __restrict__ running_mean,
                                      float* __restrict__ running_var,
                                      float* __restrict__ scale,
                                      const int N, const int C, const double S,
                                      const float eps, const float momentum,
                                      const bool use_batch_stats, const bool update_running) {
    const int c = blockIdx.x * blockDim.x + threadIdx.x;
    if (c >= C) return;

    float a;
    if (use_batch_stats) {
        const double M = (double)N * S;
        double s = 0.0;
        double sq = 0.0;
        for (int n = 0; n < N; ++n) {
            s += (double)sums[n * C + c];
            sq += (double)sumsq[n * C + c];
        }
        const double mu = s / M;
        double var = sq / M - mu * mu;
        if (var < 0.0) var = 0.0;
        a = gamma[c] / (float)sqrt(var + (double)eps);
        if (update_running) {
            const double m = (double)momentum;
            const double unb = var * (M / (M - 1.0));  // unbiased estimator
            running_mean[c] = (float)((1.0 - m) * (double)running_mean[c] + m * mu);
            running_var[c] = (float)((1.0 - m) * (double)running_var[c] + m * unb);
        }
    } else {
        a = gamma[c] / sqrtf(running_var[c] + eps);
    }
    scale[c] = a;
}

__global__ void apply_scale_meansub_kernel(const float* __restrict__ x,
                                           const float* __restrict__ sums,
                                           const float* __restrict__ scale,
                                           float* __restrict__ out,
                                           const int C, const int S, const float invS) {
    const int seg = blockIdx.y;
    const int c = seg % C;
    const float a = scale[c];
    const float mean = sums[seg] * invS;
    const long segStart = (long)seg * (long)S;
    const long segEnd = segStart + (long)S;
    long idx = segStart + (long)blockIdx.x * (BLOCK_SIZE * ITEMS_PER_THREAD) + threadIdx.x;

#pragma unroll
    for (int k = 0; k < ITEMS_PER_THREAD; ++k) {
        if (idx < segEnd) {
            out[idx] = a * (x[idx] - mean);
        }
        idx += BLOCK_SIZE;
    }
}

torch::Tensor fused_bn_meansub(torch::Tensor x, torch::Tensor gamma,
                               torch::Tensor running_mean, torch::Tensor running_var,
                               double eps, double momentum, bool use_batch_stats, bool update_running) {
    TORCH_CHECK(x.is_cuda(), "x must be a CUDA tensor");
    TORCH_CHECK(x.scalar_type() == at::kFloat, "x must be float32");
    TORCH_CHECK(x.is_contiguous(), "x must be contiguous");

    const int N = (int)x.size(0);
    const int C = (int)x.size(1);
    long S = 1;
    for (int i = 2; i < (int)x.dim(); ++i) S *= x.size(i);

    auto out = torch::empty_like(x);
    auto fopts = torch::TensorOptions().dtype(torch::kFloat32).device(x.device());
    auto sums = torch::zeros({(long)N * (long)C}, fopts);
    auto sumsq = torch::zeros({(long)N * (long)C}, fopts);
    auto scale = torch::empty({(long)C}, fopts);

    cudaStream_t stream = at::cuda::getCurrentCUDAStream();

    const int elems_per_block = BLOCK_SIZE * ITEMS_PER_THREAD;
    const int chunks = (int)((S + elems_per_block - 1) / elems_per_block);
    dim3 grid(chunks, N * C);

    spatial_reduce_kernel<<<grid, BLOCK_SIZE, 0, stream>>>(
        x.data_ptr<float>(), sums.data_ptr<float>(), sumsq.data_ptr<float>(), (int)S);

    const int cthreads = 128;
    const int cblocks = (C + cthreads - 1) / cthreads;
    channel_params_kernel<<<cblocks, cthreads, 0, stream>>>(
        sums.data_ptr<float>(), sumsq.data_ptr<float>(), gamma.data_ptr<float>(),
        running_mean.data_ptr<float>(), running_var.data_ptr<float>(),
        scale.data_ptr<float>(), N, C, (double)S, (float)eps, (float)momentum,
        use_batch_stats, update_running);

    const float invS = (float)(1.0 / (double)S);
    apply_scale_meansub_kernel<<<grid, BLOCK_SIZE, 0, stream>>>(
        x.data_ptr<float>(), sums.data_ptr<float>(), scale.data_ptr<float>(),
        out.data_ptr<float>(), C, (int)S, invS);

    return out;
}
"""

_ext = load_inline(
    name="fused_bn_spatial_meansub",
    cpp_sources=_fused_cpp_source,
    cuda_sources=_fused_cuda_source,
    functions=["fused_bn_meansub"],
    verbose=False,
    extra_cuda_cflags=["-O3"],
)


class ModelNew(nn.Module):
    """
    ConvTranspose3d (cuDNN) + fused BatchNorm3d/spatial-mean-subtraction CUDA kernel.
    """

    def __init__(self, in_channels, out_channels, kernel_size, stride, padding, bias=True):
        super(ModelNew, self).__init__()
        self.conv_transpose = nn.ConvTranspose3d(in_channels, out_channels, kernel_size,
                                                 stride=stride, padding=padding, bias=bias)
        self.batch_norm = nn.BatchNorm3d(out_channels)

    def forward(self, x):
        bn = self.batch_norm
        ct = self.conv_transpose

        if not (x.is_cuda and x.dtype == torch.float32):
            y = F.conv_transpose3d(x, ct.weight, ct.bias, ct.stride, ct.padding,
                                   ct.output_padding, ct.groups, ct.dilation)
            y = bn(y)
            return y - torch.mean(y, dim=(2, 3, 4), keepdim=True)

        # The conv bias cancels in the final spatial-mean subtraction, so skip it.
        y = F.conv_transpose3d(x, ct.weight, None, ct.stride, ct.padding,
                               ct.output_padding, ct.groups, ct.dilation)

        gamma = bn.weight
        if gamma is None:
            gamma = torch.ones(bn.num_features, device=y.device, dtype=y.dtype)
        running_mean = bn.running_mean
        running_var = bn.running_var
        if running_mean is None:
            running_mean = gamma  # dummy, unused
            running_var = gamma

        use_batch_stats = bn.training or (not bn.track_running_stats)
        update_running = bn.training and bn.track_running_stats
        momentum = bn.momentum
        if momentum is None:
            if update_running:
                bn.num_batches_tracked += 1
                momentum = 1.0 / float(bn.num_batches_tracked.item())
            else:
                momentum = 0.1

        return _ext.fused_bn_meansub(y, gamma, running_mean, running_var,
                                     float(bn.eps), float(momentum),
                                     use_batch_stats, update_running)
```
Result of evaluating it:
The solution is correct on the test inputs. Mean runtime 1.9 ms; the PyTorch reference (with TF32 enabled) takes 4.19 ms; speedup 2.205x.
Profiler, top device kernels of one forward pass of your solution:
| device kernel | total device time (us) | calls |
|---|---|---|
| sm80_xmma_dgrad_implicit_gemm_indexed_tf32f32_tf32f32_f32_nhwckrsc_nhwc_tilesize256x64x32_ | 739.4 | 1 |
| void cudnn::engines_precompiled::nhwcToNchwKernel<float, float, float, true, false, (cudnn | 394.9 | 1 |
| apply_scale_meansub_kernel(float const*, float const*, float const*, float*, int, int, flo | 360.5 | 1 |
| spatial_reduce_kernel(float const*, float*, float*, int) | 228.0 | 1 |
| void xmma__5x_cudnn::implicit_gemm::strided_dgrad_indexed::kernel_helper_stage_3<xmma__5x_ | 83.2 | 1 |
| void cudnn::engines_precompiled::nchwToNhwcKernel<float, float, float, false, true, (cudnn | 34.7 | 2 |
| channel_params_kernel(float const*, float const*, float const*, float*, float*, float*, in | 6.7 | 1 |
| void at::native::vectorized_elementwise_kernel<4, at::native::FillFunctor<float>, std::arr | 4.7 | 2 |

Write an improved complete ModelNew: fix any error, and if the solution is already correct, make it faster. Output the new code in one ```python codeblock. Just the model code, no other text, and NO testing code.


Precision rule: the timed forward must compute in FP32 (TF32 tensor-core math is allowed, as in the PyTorch reference). Do not cast inputs, weights or intermediate results to float16 or bfloat16 and do not call half-precision kernels in forward().
