```python
# Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
from torch.utils.cpp_extension import load_inline

# Enable cuDNN autotuning so the 3D convolution picks the fastest algorithm
# for the fixed input shapes used by this model.
torch.backends.cudnn.benchmark = True

# Fused CUDA kernel:
#   1) min over the depth dimension (dim=2) of the conv3d output (N, C, D, H, W)
#   2) softmax over the channel dimension (dim=1) of the result (N, C, H, W)
# This avoids materializing the intermediate min tensor in global memory and
# replaces two kernel launches (and their extra global memory round-trips)
# with a single, fully coalesced kernel.
fused_min_softmax_cuda_src = r"""
#include <torch/extension.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAException.h>
#include <cuda_runtime.h>
#include <cmath>

namespace {

// Specialized kernel: one thread per (n, h, w) spatial location.
// The per-channel min values live in registers (C is a compile-time constant),
// and the softmax over channels is computed entirely within the thread.
// Threads in a warp access consecutive spatial addresses -> fully coalesced.
template <int C>
__global__ void fused_min_softmax_kernel(
        const float* __restrict__ in,
        float* __restrict__ out,
        int N, int D, int H, int W) {
    const int HW = H * W;
    const int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= N * HW) return;

    const int n = idx / HW;
    const int spatial = idx - n * HW;

    const float* in_n = in + (size_t)n * C * D * HW + spatial;

    float vals[C];
    #pragma unroll
    for (int c = 0; c < C; ++c) {
        const float* p = in_n + (size_t)c * D * HW;
        float m = p[0];
        #pragma unroll 4
        for (int d = 1; d < D; ++d) {
            m = fminf(m, p[(size_t)d * HW]);
        }
        vals[c] = m;
    }

    // numerically stable softmax over the channel values held in registers
    float maxv = vals[0];
    #pragma unroll
    for (int c = 1; c < C; ++c) maxv = fmaxf(maxv, vals[c]);

    float sum = 0.0f;
    #pragma unroll
    for (int c = 0; c < C; ++c) {
        vals[c] = expf(vals[c] - maxv);
        sum += vals[c];
    }
    const float inv = 1.0f / sum;

    float* out_n = out + (size_t)n * C * HW + spatial;
    #pragma unroll
    for (int c = 0; c < C; ++c) {
        out_n[(size_t)c * HW] = vals[c] * inv;
    }
}

// Generic fallback for arbitrary channel counts: one block per (n, h, w),
// threads cooperate over channels using shared memory.
__global__ void fused_min_softmax_generic_kernel(
        const float* __restrict__ in,
        float* __restrict__ out,
        int N, int C, int D, int H, int W) {
    extern __shared__ float smem[];  // [0..C): per-channel mins/exps, then reduction scratch
    const int HW = H * W;
    const int n = blockIdx.x / HW;
    const int spatial = blockIdx.x - n * HW;
    const int tid = threadIdx.x;
    const int nt = blockDim.x;

    const float* in_n = in + (size_t)n * C * D * HW + spatial;

    for (int c = tid; c < C; c += nt) {
        const float* p = in_n + (size_t)c * D * HW;
        float m = p[0];
        for (int d = 1; d < D; ++d) m = fminf(m, p[(size_t)d * HW]);
        smem[c] = m;
    }
    __syncthreads();

    float* red = smem + C;
    float lmax = -INFINITY;
    for (int c = tid; c < C; c += nt) lmax = fmaxf(lmax, smem[c]);
    red[tid] = lmax;
    __syncthreads();
    for (int s = nt >> 1; s > 0; s >>= 1) {
        if (tid < s) red[tid] = fmaxf(red[tid], red[tid + s]);
        __syncthreads();
    }
    const float maxv = red[0];
    __syncthreads();

    float lsum = 0.0f;
    for (int c = tid; c < C; c += nt) {
        const float e = expf(smem[c] - maxv);
        smem[c] = e;
        lsum += e;
    }
    red[tid] = lsum;
    __syncthreads();
    for (int s = nt >> 1; s > 0; s >>= 1) {
        if (tid < s) red[tid] += red[tid + s];
        __syncthreads();
    }
    const float inv = 1.0f / red[0];

    float* out_n = out + (size_t)n * C * HW + spatial;
    for (int c = tid; c < C; c += nt) {
        out_n[(size_t)c * HW] = smem[c] * inv;
    }
}

}  // namespace

torch::Tensor fused_min_softmax_cuda(torch::Tensor input) {
    TORCH_CHECK(input.is_cuda(), "input must be a CUDA tensor");
    TORCH_CHECK(input.dim() == 5, "input must be 5D (N, C, D, H, W)");
    TORCH_CHECK(input.scalar_type() == at::kFloat, "input must be float32");

    auto in = input.contiguous();
    const int N = (int)in.size(0);
    const int C = (int)in.size(1);
    const int D = (int)in.size(2);
    const int H = (int)in.size(3);
    const int W = (int)in.size(4);
    TORCH_CHECK(D >= 1, "depth must be >= 1");

    auto out = at::empty({N, C, H, W}, in.options());
    const int HW = H * W;
    const long long total = (long long)N * HW;
    if (total == 0 || C == 0) return out;

    cudaStream_t stream = at::cuda::getCurrentCUDAStream();
    const float* in_ptr = in.data_ptr<float>();
    float* out_ptr = out.data_ptr<float>();

    const int threads = 256;
    const int blocks = (int)((total + threads - 1) / threads);

    #define FUSED_LAUNCH_CASE(CC)                                              \
        case CC:                                                               \
            fused_min_softmax_kernel<CC><<<blocks, threads, 0, stream>>>(      \
                in_ptr, out_ptr, N, D, H, W);                                  \
            break;

    switch (C) {
        FUSED_LAUNCH_CASE(1)
        FUSED_LAUNCH_CASE(2)
        FUSED_LAUNCH_CASE(3)
        FUSED_LAUNCH_CASE(4)
        FUSED_LAUNCH_CASE(6)
        FUSED_LAUNCH_CASE(8)
        FUSED_LAUNCH_CASE(12)
        FUSED_LAUNCH_CASE(16)
        FUSED_LAUNCH_CASE(24)
        FUSED_LAUNCH_CASE(32)
        FUSED_LAUNCH_CASE(48)
        FUSED_LAUNCH_CASE(64)
        FUSED_LAUNCH_CASE(96)
        FUSED_LAUNCH_CASE(128)
        default: {
            const int gthreads = 128;
            const size_t shmem = ((size_t)C + gthreads) * sizeof(float);
            fused_min_softmax_generic_kernel<<<(int)total, gthreads, shmem, stream>>>(
                in_ptr, out_ptr, N, C, D, H, W);
            break;
        }
    }
    #undef FUSED_LAUNCH_CASE

    C10_CUDA_KERNEL_LAUNCH_CHECK();
    return out;
}
"""

fused_min_softmax_cpp_src = (
    "torch::Tensor fused_min_softmax_cuda(torch::Tensor input);"
)

_fused_ops = load_inline(
    name="fused_min_softmax_ext",
    cpp_sources=fused_min_softmax_cpp_src,
    cuda_sources=fused_min_softmax_cuda_src,
    functions=["fused_min_softmax_cuda"],
    verbose=False,
    extra_cflags=["-O3"],
    extra_cuda_cflags=["-O3"],
)


class ModelNew(nn.Module):
    """
    Optimized version of Model:
      - conv3d is kept on the highly-tuned cuDNN path (with autotuning enabled)
      - the subsequent min-over-depth and softmax-over-channels are fused into a
        single custom CUDA kernel, eliminating the intermediate tensor and the
        extra global-memory traffic of the two separate operators.
    """
    def __init__(self, in_channels, out_channels, kernel_size, dim):
        super(ModelNew, self).__init__()
        self.conv = nn.Conv3d(in_channels, out_channels, kernel_size)
        self.dim = dim

    def forward(self, x):
        """
        Args:
            x (torch.Tensor): Input tensor of shape (batch_size, in_channels, D, H, W)
        Returns:
            torch.Tensor: Output tensor of shape (batch_size, out_channels, H, W)
        """
        x = self.conv(x)
        dim = self.dim if self.dim >= 0 else self.dim + x.dim()
        if dim == 2 and x.is_cuda and x.dtype == torch.float32 and x.size(1) <= 4096:
            # fused: min over dim=2 (depth) + softmax over dim=1 (channels)
            return _fused_ops.fused_min_softmax_cuda(x)
        x = torch.min(x, dim=dim)[0]
        x = torch.softmax(x, dim=1)
        return x
```