You write custom CUDA kernels to replace the pytorch operators in the given architecture to get speedups. 

    You have complete freedom to choose the set of operators you want to replace. You may make the decision to replace some operators with custom CUDA kernels and leave others unchanged. You may replace multiple operators with custom implementations, consider operator fusion opportunities (combining multiple operators into a single kernel, for example, combining matmul+relu), or algorithmic changes (such as online softmax). You are only limited by your imagination.


        Here's an example to show you the syntax of inline embedding custom CUDA operators in torch: The example given architecture is: 

        ``` 

        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F


class Model(nn.Module):
    def __init__(self) -> None:
        super().__init__()

    def forward(self, a, b):
        return a + b


def get_inputs():
    # randomly generate input tensors based on the model architecture
    a = torch.randn(1, 128).cuda()
    b = torch.randn(1, 128).cuda()
    return [a, b]


def get_init_inputs():
    # randomly generate tensors required for initialization based on the model architecture
    return []

        ``` 

        The example new arch with custom CUDA kernels looks like this:
        ```
        # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Define the custom CUDA kernel for element-wise addition
elementwise_add_source = """
#include <torch/extension.h>
#include <cuda_runtime.h>

__global__ void elementwise_add_kernel(const float* a, const float* b, float* out, int size) {
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx < size) {
        out[idx] = a[idx] + b[idx];
    }
}

torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b) {
    auto size = a.numel();
    auto out = torch::zeros_like(a);

    const int block_size = 256;
    const int num_blocks = (size + block_size - 1) / block_size;

    elementwise_add_kernel<<<num_blocks, block_size>>>(a.data_ptr<float>(), b.data_ptr<float>(), out.data_ptr<float>(), size);

    return out;
}
"""

elementwise_add_cpp_source = (
    "torch::Tensor elementwise_add_cuda(torch::Tensor a, torch::Tensor b);"
)

# Compile the inline CUDA code for element-wise addition
elementwise_add = load_inline(
    name="elementwise_add",
    cpp_sources=elementwise_add_cpp_source,
    cuda_sources=elementwise_add_source,
    functions=["elementwise_add_cuda"],
    verbose=True,
    extra_cflags=[""],
    extra_ldflags=[""],
)


class ModelNew(nn.Module):
    def __init__(self) -> None:
        super().__init__()
        self.elementwise_add = elementwise_add

    def forward(self, a, b):
        return self.elementwise_add.elementwise_add_cuda(a, b)

        ``` 

        
    You are given the following architecture: 

    ```
    # Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn

class Model(nn.Module):
    """
    Simple model that performs a matrix multiplication, adds a value, applies Swish, Tanh, GELU, and Hardtanh activation functions.
    """
    def __init__(self, in_features, out_features, add_value_shape):
        super(Model, self).__init__()
        self.matmul = nn.Linear(in_features, out_features)
        self.add_value = nn.Parameter(torch.randn(add_value_shape)) 

    def forward(self, x):
        x = self.matmul(x)
        x = x + self.add_value
        x = torch.sigmoid(x) * x # Swish
        x = torch.tanh(x)
        x = torch.nn.functional.gelu(x) # GELU
        x = torch.nn.functional.hardtanh(x, min_val=-1, max_val=1) # Hardtanh
        return x

batch_size = 1024
in_features = 8192
out_features = 8192
add_value_shape = (out_features,)

def get_inputs():
    return [torch.rand(batch_size, in_features)]

def get_init_inputs():
    return [in_features, out_features, add_value_shape]
    ```
    
Optimize the architecture named Model with custom CUDA operators! Name your optimized output architecture ModelNew. Output the new code in codeblocks. Please generate real code, NOT pseudocode, make sure the code compiles and is fully functional. Just output the new model code, no other text, and NO testing code! 



This is turn 6 of 6 for this task. Your previous solution (turn 5) was:
```python
# Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Refinement of the validated 2.15x solution (numerics class unchanged:
# FP16 tensor-core GEMM with FP32 accumulate and FP32 output):
#   * Wider one-time cublasLt autotune: request up to 32 heuristic
#     algorithms, allow 64MB workspace (unlocks split-K variants), time the
#     top candidates with CUDA events (2 warmups + 4 reps, min) and cache the
#     winning plan per (M,N,K,device). Falls back to cublasGemmEx on failure.
#   * Epilogue transcendental chain (bias + Swish -> Tanh -> GELU(erf) ->
#     Hardtanh) now uses __expf / __fdividef (max ~2 ulp deviation, utterly
#     negligible next to the FP16 input quantization) to cut issue pressure,
#     since the epilogue is partly instruction-throughput bound.
#   * Same vectorized FP32->FP16 cast kernels and 16-floats/thread fused
#     epilogue memory pattern that previously validated.

cuda_source = r"""
#include <torch/extension.h>
#include <ATen/ATen.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <cuda_runtime.h>
#include <cuda_fp16.h>
#include <cublas_v2.h>
#include <cublasLt.h>
#include <unordered_map>
#include <memory>

namespace {

__device__ __forceinline__ float fused_act(float v) {
    // Swish: v * sigmoid(v) = v / (1 + exp(-v))
    float e = __expf(-v);
    float sv = __fdividef(v, 1.0f + e);
    // Tanh (accurate path; range of sv is modest)
    float tv = tanhf(sv);
    // GELU (exact erf form, matches F.gelu default)
    float gv = fmaf(0.5f * tv, erff(tv * 0.70710678118654752440f), 0.5f * tv);
    // Hardtanh clamp to [-1, 1]
    return fminf(fmaxf(gv, -1.0f), 1.0f);
}

// -------------------- cast kernels --------------------
__global__ void __launch_bounds__(256)
cast_f32_f16_vec16_kernel(const float4* __restrict__ in,
                          uint4* __restrict__ out, int n16) {
    int p = blockIdx.x * blockDim.x + threadIdx.x;
    if (p >= n16) return;
    float4 a = in[4 * p];
    float4 b = in[4 * p + 1];
    float4 c = in[4 * p + 2];
    float4 d = in[4 * p + 3];
    uint4 u0, u1;
    __half2* h0 = reinterpret_cast<__half2*>(&u0);
    __half2* h1 = reinterpret_cast<__half2*>(&u1);
    h0[0] = __floats2half2_rn(a.x, a.y);
    h0[1] = __floats2half2_rn(a.z, a.w);
    h0[2] = __floats2half2_rn(b.x, b.y);
    h0[3] = __floats2half2_rn(b.z, b.w);
    h1[0] = __floats2half2_rn(c.x, c.y);
    h1[1] = __floats2half2_rn(c.z, c.w);
    h1[2] = __floats2half2_rn(d.x, d.y);
    h1[3] = __floats2half2_rn(d.z, d.w);
    out[2 * p]     = u0;
    out[2 * p + 1] = u1;
}

__global__ void __launch_bounds__(256)
cast_f32_f16_vec4_kernel(const float4* __restrict__ in,
                         __half2* __restrict__ out, int n4) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i < n4) {
        float4 v = in[i];
        out[2 * i]     = __floats2half2_rn(v.x, v.y);
        out[2 * i + 1] = __floats2half2_rn(v.z, v.w);
    }
}

__global__ void __launch_bounds__(256)
cast_f32_f16_scalar_kernel(const float* __restrict__ in,
                           __half* __restrict__ out, long long n) {
    long long i = (long long)blockIdx.x * blockDim.x + threadIdx.x;
    if (i < n) out[i] = __float2half_rn(in[i]);
}

// -------------------- epilogue kernels --------------------
// 16 floats per thread; requires cols4 % 4 == 0.
__global__ void __launch_bounds__(256)
epilogue_vec4x4_kernel(float4* __restrict__ data,
                       const float4* __restrict__ ba, int cols4) {
    int p = blockIdx.x * blockDim.x + threadIdx.x;
    int c4 = 4 * p;
    if (c4 >= cols4) return;
    long long base = (long long)blockIdx.y * cols4 + c4;
    #pragma unroll
    for (int j = 0; j < 4; ++j) {
        float4 v = data[base + j];
        float4 b = ba[c4 + j];
        v.x = fused_act(v.x + b.x);
        v.y = fused_act(v.y + b.y);
        v.z = fused_act(v.z + b.z);
        v.w = fused_act(v.w + b.w);
        data[base + j] = v;
    }
}

// 8 floats per thread; requires cols4 % 2 == 0.
__global__ void __launch_bounds__(256)
epilogue_vec4x2_kernel(float4* __restrict__ data,
                       const float4* __restrict__ ba, int cols4) {
    int p = blockIdx.x * blockDim.x + threadIdx.x;
    int c4 = 2 * p;
    if (c4 >= cols4) return;
    long long base = (long long)blockIdx.y * cols4 + c4;
    float4 v0 = data[base];
    float4 v1 = data[base + 1];
    float4 b0 = ba[c4];
    float4 b1 = ba[c4 + 1];
    v0.x = fused_act(v0.x + b0.x);
    v0.y = fused_act(v0.y + b0.y);
    v0.z = fused_act(v0.z + b0.z);
    v0.w = fused_act(v0.w + b0.w);
    v1.x = fused_act(v1.x + b1.x);
    v1.y = fused_act(v1.y + b1.y);
    v1.z = fused_act(v1.z + b1.z);
    v1.w = fused_act(v1.w + b1.w);
    data[base]     = v0;
    data[base + 1] = v1;
}

__global__ void __launch_bounds__(256)
epilogue_scalar_kernel(float* __restrict__ data,
                       const float* __restrict__ ba, int cols) {
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    if (col < cols) {
        long long idx = (long long)blockIdx.y * cols + col;
        data[idx] = fused_act(data[idx] + ba[col]);
    }
}

// -------------------- cublasLt plan cache --------------------
struct LtPlan {
    cublasLtMatmulDesc_t opDesc = nullptr;
    cublasLtMatrixLayout_t Adesc = nullptr;
    cublasLtMatrixLayout_t Bdesc = nullptr;
    cublasLtMatrixLayout_t Cdesc = nullptr;
    cublasLtMatrixLayout_t Ddesc = nullptr;
    cublasLtMatmulAlgo_t algo{};
    torch::Tensor workspace;
    void* wsPtr = nullptr;
    size_t wsSize = 0;
};

cublasLtHandle_t g_lt = nullptr;
std::unordered_map<int64_t, std::unique_ptr<LtPlan>> g_plans;

int64_t make_key(int64_t M, int64_t N, int64_t K, int dev) {
    uint64_t h = 1469598103934665603ull;
    auto mix = [&h](uint64_t v) { h ^= v; h *= 1099511628211ull; };
    mix((uint64_t)M); mix((uint64_t)N); mix((uint64_t)K); mix((uint64_t)dev);
    return (int64_t)h;
}

LtPlan* get_plan(int M, int N, int K, int dev,
                 const torch::Tensor& A, const torch::Tensor& B,
                 torch::Tensor& D, cudaStream_t stream) {
    int64_t key = make_key(M, N, K, dev);
    auto it = g_plans.find(key);
    if (it != g_plans.end()) return it->second.get();

    if (g_lt == nullptr) {
        if (cublasLtCreate(&g_lt) != CUBLAS_STATUS_SUCCESS) return nullptr;
    }

    auto plan = std::make_unique<LtPlan>();
    bool ok = cublasLtMatmulDescCreate(&plan->opDesc, CUBLAS_COMPUTE_32F,
                                       CUDA_R_32F) == CUBLAS_STATUS_SUCCESS;
    cublasOperation_t opT = CUBLAS_OP_T, opN = CUBLAS_OP_N;
    ok = ok && cublasLtMatmulDescSetAttribute(
                   plan->opDesc, CUBLASLT_MATMUL_DESC_TRANSA, &opT,
                   sizeof(opT)) == CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatmulDescSetAttribute(
                   plan->opDesc, CUBLASLT_MATMUL_DESC_TRANSB, &opN,
                   sizeof(opN)) == CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatrixLayoutCreate(&plan->Adesc, CUDA_R_16F, K, N, K) ==
                   CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatrixLayoutCreate(&plan->Bdesc, CUDA_R_16F, K, M, K) ==
                   CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatrixLayoutCreate(&plan->Cdesc, CUDA_R_32F, N, M, N) ==
                   CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatrixLayoutCreate(&plan->Ddesc, CUDA_R_32F, N, M, N) ==
                   CUBLAS_STATUS_SUCCESS;
    if (!ok) return nullptr;

    cublasLtMatmulPreference_t pref = nullptr;
    if (cublasLtMatmulPreferenceCreate(&pref) != CUBLAS_STATUS_SUCCESS)
        return nullptr;
    size_t maxWs = (size_t)64 << 20;  // 64 MB: unlocks split-K variants
    cublasLtMatmulPreferenceSetAttribute(
        pref, CUBLASLT_MATMUL_PREF_MAX_WORKSPACE_BYTES, &maxWs, sizeof(maxWs));

    const int maxResults = 32;
    cublasLtMatmulHeuristicResult_t results[maxResults];
    int nres = 0;
    cublasStatus_t st = cublasLtMatmulAlgoGetHeuristic(
        g_lt, plan->opDesc, plan->Adesc, plan->Bdesc, plan->Cdesc, plan->Ddesc,
        pref, maxResults, results, &nres);
    cublasLtMatmulPreferenceDestroy(pref);
    if (st != CUBLAS_STATUS_SUCCESS || nres <= 0) return nullptr;

    const float alpha = 1.0f, beta = 0.0f;
    const void* Aptr = A.data_ptr();
    const void* Bptr = B.data_ptr();
    void* Dptr = D.data_ptr();

    cudaEvent_t e0, e1;
    cudaEventCreate(&e0);
    cudaEventCreate(&e1);
    float bestMs = 1e30f;
    int best = -1;
    torch::Tensor bestWs;
    const int maxTry = nres < 12 ? nres : 12;
    for (int i = 0; i < maxTry; ++i) {
        if (results[i].state != CUBLAS_STATUS_SUCCESS) continue;
        size_t ws = results[i].workspaceSize;
        torch::Tensor wsT;
        void* wsPtr = nullptr;
        if (ws > 0) {
            wsT = torch::empty({(int64_t)ws},
                               A.options().dtype(torch::kUInt8));
            wsPtr = wsT.data_ptr();
        }
        auto run = [&]() {
            return cublasLtMatmul(g_lt, plan->opDesc, &alpha, Aptr, plan->Adesc,
                                  Bptr, plan->Bdesc, &beta, Dptr, plan->Cdesc,
                                  Dptr, plan->Ddesc, &results[i].algo, wsPtr,
                                  ws, stream);
        };
        if (run() != CUBLAS_STATUS_SUCCESS) continue;  // warmup 1
        if (run() != CUBLAS_STATUS_SUCCESS) continue;  // warmup 2
        float msBest = 1e30f;
        for (int r = 0; r < 4; ++r) {
            cudaEventRecord(e0, stream);
            if (run() != CUBLAS_STATUS_SUCCESS) { msBest = 1e30f; break; }
            cudaEventRecord(e1, stream);
            cudaEventSynchronize(e1);
            float ms = 0.f;
            cudaEventElapsedTime(&ms, e0, e1);
            if (ms < msBest) msBest = ms;
        }
        if (msBest < bestMs) {
            bestMs = msBest;
            best = i;
            bestWs = wsT;
        }
    }
    cudaEventDestroy(e0);
    cudaEventDestroy(e1);
    if (best < 0) return nullptr;

    plan->algo = results[best].algo;
    plan->workspace = bestWs;
    plan->wsPtr = plan->workspace.defined() ? plan->workspace.data_ptr()
                                            : nullptr;
    plan->wsSize = results[best].workspaceSize;
    LtPlan* ret = plan.get();
    g_plans.emplace(key, std::move(plan));
    return ret;
}

}  // namespace

torch::Tensor fused_forward_cuda(torch::Tensor x, torch::Tensor w_half,
                                 torch::Tensor bias_add) {
    TORCH_CHECK(x.is_cuda() && w_half.is_cuda() && bias_add.is_cuda(),
                "all inputs must be CUDA tensors");
    TORCH_CHECK(x.scalar_type() == at::kFloat, "x must be float32");
    TORCH_CHECK(w_half.scalar_type() == at::kHalf, "w_half must be half");
    TORCH_CHECK(bias_add.scalar_type() == at::kFloat,
                "bias_add must be float32");

    const c10::cuda::CUDAGuard guard(x.device());

    auto xc = x.is_contiguous() ? x : x.contiguous();
    auto wc = w_half.is_contiguous() ? w_half : w_half.contiguous();
    auto bc = bias_add.is_contiguous() ? bias_add : bias_add.contiguous();

    const int64_t M = xc.size(0);
    const int64_t K = xc.size(1);
    const int64_t N = wc.size(0);
    TORCH_CHECK(wc.size(1) == K, "weight shape mismatch");
    TORCH_CHECK(bc.numel() == N, "bias_add shape mismatch");

    auto out = torch::empty({M, N}, xc.options());
    if (M == 0 || N == 0) return out;

    cudaStream_t stream = at::cuda::getCurrentCUDAStream();
    const int threads = 256;
    const int dev = (int)x.get_device();

    // 1) FP32 -> FP16 cast of the input (vectorized when possible).
    auto x_half = torch::empty({M, K}, xc.options().dtype(at::kHalf));
    const long long numel = (long long)M * K;
    if ((numel & 15LL) == 0 && (numel >> 4) <= (long long)INT_MAX) {
        int n16 = (int)(numel >> 4);
        int blocks = (n16 + threads - 1) / threads;
        cast_f32_f16_vec16_kernel<<<blocks, threads, 0, stream>>>(
            reinterpret_cast<const float4*>(xc.data_ptr<float>()),
            reinterpret_cast<uint4*>(x_half.data_ptr<at::Half>()), n16);
    } else if ((numel & 3LL) == 0 && (numel >> 2) <= (long long)INT_MAX) {
        int n4 = (int)(numel >> 2);
        int blocks = (n4 + threads - 1) / threads;
        cast_f32_f16_vec4_kernel<<<blocks, threads, 0, stream>>>(
            reinterpret_cast<const float4*>(xc.data_ptr<float>()),
            reinterpret_cast<__half2*>(x_half.data_ptr<at::Half>()), n4);
    } else {
        long long blocks = (numel + threads - 1) / threads;
        TORCH_CHECK(blocks <= (long long)INT_MAX, "input too large");
        cast_f32_f16_scalar_kernel<<<(unsigned int)blocks, threads, 0,
                                     stream>>>(
            xc.data_ptr<float>(),
            reinterpret_cast<__half*>(x_half.data_ptr<at::Half>()), numel);
    }

    // 2) GEMM: out(M,N) = x(M,K) @ w(N,K)^T via column-major view:
    //      out_cm(N,M) = op_T(w_cm(K,N)) @ x_cm(K,M)
    bool done = false;
    try {
        LtPlan* plan = get_plan((int)M, (int)N, (int)K, dev, wc, x_half, out,
                                stream);
        if (plan != nullptr) {
            const float alpha = 1.0f, beta = 0.0f;
            cublasStatus_t st = cublasLtMatmul(
                g_lt, plan->opDesc, &alpha, wc.data_ptr(), plan->Adesc,
                x_half.data_ptr(), plan->Bdesc, &beta, out.data_ptr(),
                plan->Cdesc, out.data_ptr(), plan->Ddesc, &plan->algo,
                plan->wsPtr, plan->wsSize, stream);
            done = (st == CUBLAS_STATUS_SUCCESS);
        }
    } catch (...) {
        done = false;
    }
    if (!done) {
        // Fallback: plain cublasGemmEx (known-good path).
        cublasHandle_t handle = at::cuda::getCurrentCUDABlasHandle();
        cublasSetStream(handle, stream);
        const float alpha = 1.0f, beta = 0.0f;
        cublasStatus_t status = cublasGemmEx(
            handle, CUBLAS_OP_T, CUBLAS_OP_N, (int)N, (int)M, (int)K, &alpha,
            wc.data_ptr<at::Half>(), CUDA_R_16F, (int)K,
            x_half.data_ptr<at::Half>(), CUDA_R_16F, (int)K, &beta,
            out.data_ptr<float>(), CUDA_R_32F, (int)N, CUBLAS_COMPUTE_32F,
            CUBLAS_GEMM_DEFAULT);
        TORCH_CHECK(status == CUBLAS_STATUS_SUCCESS,
                    "cublasGemmEx failed with status ", (int)status);
    }

    // 3) Fused epilogue: out = hardtanh(gelu(tanh(swish(out + bias)))).
    float* out_ptr = out.data_ptr<float>();
    const float* ba_ptr = bc.data_ptr<float>();
    const int64_t maxRows = 65535;
    const int cols4 = (int)(N >> 2);
    for (int64_t r0 = 0; r0 < M; r0 += maxRows) {
        int64_t rem = M - r0;
        int rows = (int)(rem < maxRows ? rem : maxRows);
        float4* rowPtr = reinterpret_cast<float4*>(out_ptr +
                                                   (long long)r0 * N);
        if ((N & 15) == 0) {
            int quads = cols4 >> 2;
            dim3 grid((quads + threads - 1) / threads, rows);
            epilogue_vec4x4_kernel<<<grid, threads, 0, stream>>>(
                rowPtr, reinterpret_cast<const float4*>(ba_ptr), cols4);
        } else if ((N & 7) == 0) {
            int pairs = cols4 >> 1;
            dim3 grid((pairs + threads - 1) / threads, rows);
            epilogue_vec4x2_kernel<<<grid, threads, 0, stream>>>(
                rowPtr, reinterpret_cast<const float4*>(ba_ptr), cols4);
        } else {
            dim3 grid((int)((N + threads - 1) / threads), rows);
            epilogue_scalar_kernel<<<grid, threads, 0, stream>>>(
                out_ptr + (long long)r0 * N, ba_ptr, (int)N);
        }
    }
    return out;
}
"""

cpp_source = (
    "torch::Tensor fused_forward_cuda(torch::Tensor x, "
    "torch::Tensor w_half, torch::Tensor bias_add);"
)

fused_module = load_inline(
    name="fused_linear_fp16_swish_tanh_gelu_hardtanh_v6_lt",
    cpp_sources=cpp_source,
    cuda_sources=cuda_source,
    functions=["fused_forward_cuda"],
    verbose=False,
    extra_cuda_cflags=["-O3"],
    extra_ldflags=["-lcublas", "-lcublasLt"],
)


class ModelNew(nn.Module):
    def __init__(self, in_features, out_features, add_value_shape):
        super(ModelNew, self).__init__()
        self.matmul = nn.Linear(in_features, out_features)
        self.add_value = nn.Parameter(torch.randn(add_value_shape))
        self._fn = fused_module.fused_forward_cuda
        # Caches (plain attributes, not part of state_dict).
        self._cached_w_half = None
        self._cached_w_key = None
        self._cached_ba = None
        self._cached_ba_key = None

    def _fallback(self, x):
        x = F.linear(x, self.matmul.weight, self.matmul.bias)
        x = x + self.add_value
        x = torch.sigmoid(x) * x  # Swish
        x = torch.tanh(x)
        x = F.gelu(x)  # GELU
        x = F.hardtanh(x, min_val=-1, max_val=1)  # Hardtanh
        return x

    def forward(self, x):
        w = self.matmul.weight
        if (not x.is_cuda) or x.dtype != torch.float32 or x.dim() != 2:
            return self._fallback(x)
        N, K = w.shape[0], w.shape[1]
        if (K % 8) != 0 or (N % 8) != 0 or w.device != x.device:
            return self._fallback(x)

        w_key = (w._version, w.data_ptr())
        if self._cached_w_key != w_key:
            self._cached_w_half = w.detach().to(torch.float16).contiguous()
            self._cached_w_key = w_key

        b = self.matmul.bias
        av = self.add_value
        if b is None:
            ba_key = (None, av._version, av.data_ptr())
            if self._cached_ba_key != ba_key:
                self._cached_ba = av.detach().clone().contiguous()
                self._cached_ba_key = ba_key
        else:
            ba_key = (b._version, av._version, b.data_ptr())
            if self._cached_ba_key != ba_key:
                self._cached_ba = (b.detach() + av.detach()).contiguous()
                self._cached_ba_key = ba_key

        return self._fn(x, self._cached_w_half, self._cached_ba)
```
Result of evaluating it:
The solution is correct on the test inputs. Mean runtime 0.689 ms; the PyTorch reference (with TF32 enabled) takes 1.45 ms; speedup 2.104x.
Profiler, top device kernels of one forward pass of your solution:
| device kernel | total device time (us) | calls |
|---|---|---|
| void cutlass::Kernel2<cutlass_80_tensorop_s16816gemm_f16_128x128_32x5_tn_align8>(cutlass_8 | 563.9 | 1 |
| (anonymous namespace)::epilogue_vec4x4_kernel(float4*, float4 const*, int) | 57.7 | 1 |
| (anonymous namespace)::cast_f32_f16_vec16_kernel(float4 const*, uint4*, int) | 45.5 | 1 |
| Memset (Device) | 1.3 | 1 |

The fastest correct solution so far (2.145x speedup) is:
```python
# Copyright (c) Meta Platforms, Inc. and affiliates.
# All rights reserved.
#
# This source code is licensed under the license found in the
# LICENSE file in the root directory of this source tree.

import torch
import torch.nn as nn
import torch.nn.functional as F
from torch.utils.cpp_extension import load_inline

# Strategy (refinement of the 2.08x solution, numerics unchanged):
#   * Same FP16 tensor-core GEMM with FP32 accumulate **and FP32 output**
#     (identical numerics class to the previously-validated solution).
#   * GEMM is now driven through cublasLt with a one-time autotune over
#     the heuristic algorithm list (cached per (M,N,K,device)); the best
#     algorithm (tile shape / split-K / stages) is picked with CUDA-event
#     timing instead of blindly accepting the default heuristic. If
#     anything fails we fall back to the previous cublasGemmEx path.
#   * Input FP32->FP16 cast kernel widened to 16 floats/thread for more
#     memory-level parallelism.
#   * Epilogue (bias + Swish -> Tanh -> GELU(erf) -> Hardtanh) widened to
#     16 floats/thread when N % 16 == 0, still one fused in-place pass.

cuda_source = r"""
#include <torch/extension.h>
#include <ATen/ATen.h>
#include <ATen/cuda/CUDAContext.h>
#include <c10/cuda/CUDAGuard.h>
#include <cuda_runtime.h>
#include <cuda_fp16.h>
#include <cublas_v2.h>
#include <cublasLt.h>
#include <unordered_map>
#include <memory>

namespace {

__device__ __forceinline__ float fused_act(float v) {
    // Swish: v * sigmoid(v)
    float sv = v / (1.0f + expf(-v));
    // Tanh
    float tv = tanhf(sv);
    // GELU (exact erf form, matches F.gelu default)
    float gv = 0.5f * tv * (1.0f + erff(tv * 0.70710678118654752440f));
    // Hardtanh clamp to [-1, 1]
    return fminf(fmaxf(gv, -1.0f), 1.0f);
}

// -------------------- cast kernels --------------------
__global__ void cast_f32_f16_vec16_kernel(const float4* __restrict__ in,
                                          uint4* __restrict__ out, int n16) {
    int p = blockIdx.x * blockDim.x + threadIdx.x;
    if (p >= n16) return;
    float4 a = in[4 * p];
    float4 b = in[4 * p + 1];
    float4 c = in[4 * p + 2];
    float4 d = in[4 * p + 3];
    uint4 u0, u1;
    __half2* h0 = reinterpret_cast<__half2*>(&u0);
    __half2* h1 = reinterpret_cast<__half2*>(&u1);
    h0[0] = __floats2half2_rn(a.x, a.y);
    h0[1] = __floats2half2_rn(a.z, a.w);
    h0[2] = __floats2half2_rn(b.x, b.y);
    h0[3] = __floats2half2_rn(b.z, b.w);
    h1[0] = __floats2half2_rn(c.x, c.y);
    h1[1] = __floats2half2_rn(c.z, c.w);
    h1[2] = __floats2half2_rn(d.x, d.y);
    h1[3] = __floats2half2_rn(d.z, d.w);
    out[2 * p]     = u0;
    out[2 * p + 1] = u1;
}

__global__ void cast_f32_f16_vec4_kernel(const float4* __restrict__ in,
                                         __half2* __restrict__ out, int n4) {
    int i = blockIdx.x * blockDim.x + threadIdx.x;
    if (i < n4) {
        float4 v = in[i];
        out[2 * i]     = __floats2half2_rn(v.x, v.y);
        out[2 * i + 1] = __floats2half2_rn(v.z, v.w);
    }
}

__global__ void cast_f32_f16_scalar_kernel(const float* __restrict__ in,
                                           __half* __restrict__ out,
                                           long long n) {
    long long i = (long long)blockIdx.x * blockDim.x + threadIdx.x;
    if (i < n) out[i] = __float2half_rn(in[i]);
}

// -------------------- epilogue kernels --------------------
// 16 floats per thread; requires cols4 % 4 == 0.
__global__ void epilogue_vec4x4_kernel(float4* __restrict__ data,
                                       const float4* __restrict__ ba,
                                       int cols4) {
    int p = blockIdx.x * blockDim.x + threadIdx.x;
    int c4 = 4 * p;
    if (c4 >= cols4) return;
    long long base = (long long)blockIdx.y * cols4 + c4;
    #pragma unroll
    for (int j = 0; j < 4; ++j) {
        float4 v = data[base + j];
        float4 b = ba[c4 + j];
        v.x = fused_act(v.x + b.x);
        v.y = fused_act(v.y + b.y);
        v.z = fused_act(v.z + b.z);
        v.w = fused_act(v.w + b.w);
        data[base + j] = v;
    }
}

// 8 floats per thread; requires cols4 % 2 == 0.
__global__ void epilogue_vec4x2_kernel(float4* __restrict__ data,
                                       const float4* __restrict__ ba,
                                       int cols4) {
    int p = blockIdx.x * blockDim.x + threadIdx.x;
    int c4 = 2 * p;
    if (c4 >= cols4) return;
    long long base = (long long)blockIdx.y * cols4 + c4;
    float4 v0 = data[base];
    float4 v1 = data[base + 1];
    float4 b0 = ba[c4];
    float4 b1 = ba[c4 + 1];
    v0.x = fused_act(v0.x + b0.x);
    v0.y = fused_act(v0.y + b0.y);
    v0.z = fused_act(v0.z + b0.z);
    v0.w = fused_act(v0.w + b0.w);
    v1.x = fused_act(v1.x + b1.x);
    v1.y = fused_act(v1.y + b1.y);
    v1.z = fused_act(v1.z + b1.z);
    v1.w = fused_act(v1.w + b1.w);
    data[base]     = v0;
    data[base + 1] = v1;
}

__global__ void epilogue_scalar_kernel(float* __restrict__ data,
                                       const float* __restrict__ ba,
                                       int cols) {
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    if (col < cols) {
        long long idx = (long long)blockIdx.y * cols + col;
        data[idx] = fused_act(data[idx] + ba[col]);
    }
}

// -------------------- cublasLt plan cache --------------------
struct LtPlan {
    cublasLtMatmulDesc_t opDesc = nullptr;
    cublasLtMatrixLayout_t Adesc = nullptr;
    cublasLtMatrixLayout_t Bdesc = nullptr;
    cublasLtMatrixLayout_t Cdesc = nullptr;
    cublasLtMatrixLayout_t Ddesc = nullptr;
    cublasLtMatmulAlgo_t algo{};
    torch::Tensor workspace;
    void* wsPtr = nullptr;
    size_t wsSize = 0;
};

cublasLtHandle_t g_lt = nullptr;
std::unordered_map<int64_t, std::unique_ptr<LtPlan>> g_plans;

int64_t make_key(int64_t M, int64_t N, int64_t K, int dev) {
    uint64_t h = 1469598103934665603ull;
    auto mix = [&h](uint64_t v) { h ^= v; h *= 1099511628211ull; };
    mix((uint64_t)M); mix((uint64_t)N); mix((uint64_t)K); mix((uint64_t)dev);
    return (int64_t)h;
}

LtPlan* get_plan(int M, int N, int K, int dev,
                 const torch::Tensor& A, const torch::Tensor& B,
                 torch::Tensor& D, cudaStream_t stream) {
    int64_t key = make_key(M, N, K, dev);
    auto it = g_plans.find(key);
    if (it != g_plans.end()) return it->second.get();

    if (g_lt == nullptr) {
        if (cublasLtCreate(&g_lt) != CUBLAS_STATUS_SUCCESS) return nullptr;
    }

    auto plan = std::make_unique<LtPlan>();
    bool ok = cublasLtMatmulDescCreate(&plan->opDesc, CUBLAS_COMPUTE_32F,
                                       CUDA_R_32F) == CUBLAS_STATUS_SUCCESS;
    cublasOperation_t opT = CUBLAS_OP_T, opN = CUBLAS_OP_N;
    ok = ok && cublasLtMatmulDescSetAttribute(
                   plan->opDesc, CUBLASLT_MATMUL_DESC_TRANSA, &opT,
                   sizeof(opT)) == CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatmulDescSetAttribute(
                   plan->opDesc, CUBLASLT_MATMUL_DESC_TRANSB, &opN,
                   sizeof(opN)) == CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatrixLayoutCreate(&plan->Adesc, CUDA_R_16F, K, N, K) ==
                   CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatrixLayoutCreate(&plan->Bdesc, CUDA_R_16F, K, M, K) ==
                   CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatrixLayoutCreate(&plan->Cdesc, CUDA_R_32F, N, M, N) ==
                   CUBLAS_STATUS_SUCCESS;
    ok = ok && cublasLtMatrixLayoutCreate(&plan->Ddesc, CUDA_R_32F, N, M, N) ==
                   CUBLAS_STATUS_SUCCESS;
    if (!ok) return nullptr;

    cublasLtMatmulPreference_t pref = nullptr;
    if (cublasLtMatmulPreferenceCreate(&pref) != CUBLAS_STATUS_SUCCESS)
        return nullptr;
    size_t maxWs = (size_t)32 << 20;  // 32 MB
    cublasLtMatmulPreferenceSetAttribute(
        pref, CUBLASLT_MATMUL_PREF_MAX_WORKSPACE_BYTES, &maxWs, sizeof(maxWs));

    const int maxResults = 16;
    cublasLtMatmulHeuristicResult_t results[maxResults];
    int nres = 0;
    cublasStatus_t st = cublasLtMatmulAlgoGetHeuristic(
        g_lt, plan->opDesc, plan->Adesc, plan->Bdesc, plan->Cdesc, plan->Ddesc,
        pref, maxResults, results, &nres);
    cublasLtMatmulPreferenceDestroy(pref);
    if (st != CUBLAS_STATUS_SUCCESS || nres <= 0) return nullptr;

    const float alpha = 1.0f, beta = 0.0f;
    const void* Aptr = A.data_ptr();
    const void* Bptr = B.data_ptr();
    void* Dptr = D.data_ptr();

    cudaEvent_t e0, e1;
    cudaEventCreate(&e0);
    cudaEventCreate(&e1);
    float bestMs = 1e30f;
    int best = -1;
    torch::Tensor bestWs;
    const int maxTry = nres < 10 ? nres : 10;
    for (int i = 0; i < maxTry; ++i) {
        if (results[i].state != CUBLAS_STATUS_SUCCESS) continue;
        size_t ws = results[i].workspaceSize;
        torch::Tensor wsT;
        void* wsPtr = nullptr;
        if (ws > 0) {
            wsT = torch::empty({(int64_t)ws},
                               A.options().dtype(torch::kUInt8));
            wsPtr = wsT.data_ptr();
        }
        auto run = [&]() {
            return cublasLtMatmul(g_lt, plan->opDesc, &alpha, Aptr, plan->Adesc,
                                  Bptr, plan->Bdesc, &beta, Dptr, plan->Cdesc,
                                  Dptr, plan->Ddesc, &results[i].algo, wsPtr,
                                  ws, stream);
        };
        if (run() != CUBLAS_STATUS_SUCCESS) continue;  // warmup
        float msBest = 1e30f;
        for (int r = 0; r < 3; ++r) {
            cudaEventRecord(e0, stream);
            if (run() != CUBLAS_STATUS_SUCCESS) { msBest = 1e30f; break; }
            cudaEventRecord(e1, stream);
            cudaEventSynchronize(e1);
            float ms = 0.f;
            cudaEventElapsedTime(&ms, e0, e1);
            if (ms < msBest) msBest = ms;
        }
        if (msBest < bestMs) {
            bestMs = msBest;
            best = i;
            bestWs = wsT;
        }
    }
    cudaEventDestroy(e0);
    cudaEventDestroy(e1);
    if (best < 0) return nullptr;

    plan->algo = results[best].algo;
    plan->workspace = bestWs;
    plan->wsPtr = plan->workspace.defined() ? plan->workspace.data_ptr()
                                            : nullptr;
    plan->wsSize = results[best].workspaceSize;
    LtPlan* ret = plan.get();
    g_plans.emplace(key, std::move(plan));
    return ret;
}

}  // namespace

torch::Tensor fused_forward_cuda(torch::Tensor x, torch::Tensor w_half,
                                 torch::Tensor bias_add) {
    TORCH_CHECK(x.is_cuda() && w_half.is_cuda() && bias_add.is_cuda(),
                "all inputs must be CUDA tensors");
    TORCH_CHECK(x.scalar_type() == at::kFloat, "x must be float32");
    TORCH_CHECK(w_half.scalar_type() == at::kHalf, "w_half must be half");
    TORCH_CHECK(bias_add.scalar_type() == at::kFloat,
                "bias_add must be float32");

    const c10::cuda::CUDAGuard guard(x.device());

    auto xc = x.is_contiguous() ? x : x.contiguous();
    auto wc = w_half.is_contiguous() ? w_half : w_half.contiguous();
    auto bc = bias_add.is_contiguous() ? bias_add : bias_add.contiguous();

    const int64_t M = xc.size(0);
    const int64_t K = xc.size(1);
    const int64_t N = wc.size(0);
    TORCH_CHECK(wc.size(1) == K, "weight shape mismatch");
    TORCH_CHECK(bc.numel() == N, "bias_add shape mismatch");

    auto out = torch::empty({M, N}, xc.options());
    if (M == 0 || N == 0) return out;

    cudaStream_t stream = at::cuda::getCurrentCUDAStream();
    const int threads = 256;
    const int dev = (int)x.get_device();

    // 1) FP32 -> FP16 cast of the input (vectorized when possible).
    auto x_half = torch::empty({M, K}, xc.options().dtype(at::kHalf));
    const long long numel = (long long)M * K;
    if ((numel & 15LL) == 0 && (numel >> 4) <= (long long)INT_MAX) {
        int n16 = (int)(numel >> 4);
        int blocks = (n16 + threads - 1) / threads;
        cast_f32_f16_vec16_kernel<<<blocks, threads, 0, stream>>>(
            reinterpret_cast<const float4*>(xc.data_ptr<float>()),
            reinterpret_cast<uint4*>(x_half.data_ptr<at::Half>()), n16);
    } else if ((numel & 3LL) == 0 && (numel >> 2) <= (long long)INT_MAX) {
        int n4 = (int)(numel >> 2);
        int blocks = (n4 + threads - 1) / threads;
        cast_f32_f16_vec4_kernel<<<blocks, threads, 0, stream>>>(
            reinterpret_cast<const float4*>(xc.data_ptr<float>()),
            reinterpret_cast<__half2*>(x_half.data_ptr<at::Half>()), n4);
    } else {
        long long blocks = (numel + threads - 1) / threads;
        TORCH_CHECK(blocks <= (long long)INT_MAX, "input too large");
        cast_f32_f16_scalar_kernel<<<(unsigned int)blocks, threads, 0,
                                     stream>>>(
            xc.data_ptr<float>(),
            reinterpret_cast<__half*>(x_half.data_ptr<at::Half>()), numel);
    }

    // 2) GEMM: out(M,N) = x(M,K) @ w(N,K)^T via column-major view:
    //      out_cm(N,M) = op_T(w_cm(K,N)) @ x_cm(K,M)
    bool done = false;
    try {
        LtPlan* plan = get_plan((int)M, (int)N, (int)K, dev, wc, x_half, out,
                                stream);
        if (plan != nullptr) {
            const float alpha = 1.0f, beta = 0.0f;
            cublasStatus_t st = cublasLtMatmul(
                g_lt, plan->opDesc, &alpha, wc.data_ptr(), plan->Adesc,
                x_half.data_ptr(), plan->Bdesc, &beta, out.data_ptr(),
                plan->Cdesc, out.data_ptr(), plan->Ddesc, &plan->algo,
                plan->wsPtr, plan->wsSize, stream);
            done = (st == CUBLAS_STATUS_SUCCESS);
        }
    } catch (...) {
        done = false;
    }
    if (!done) {
        // Fallback: plain cublasGemmEx (previous known-good path).
        cublasHandle_t handle = at::cuda::getCurrentCUDABlasHandle();
        cublasSetStream(handle, stream);
        const float alpha = 1.0f, beta = 0.0f;
        cublasStatus_t status = cublasGemmEx(
            handle, CUBLAS_OP_T, CUBLAS_OP_N, (int)N, (int)M, (int)K, &alpha,
            wc.data_ptr<at::Half>(), CUDA_R_16F, (int)K,
            x_half.data_ptr<at::Half>(), CUDA_R_16F, (int)K, &beta,
            out.data_ptr<float>(), CUDA_R_32F, (int)N, CUBLAS_COMPUTE_32F,
            CUBLAS_GEMM_DEFAULT);
        TORCH_CHECK(status == CUBLAS_STATUS_SUCCESS,
                    "cublasGemmEx failed with status ", (int)status);
    }

    // 3) Fused epilogue: out = hardtanh(gelu(tanh(swish(out + bias)))).
    float* out_ptr = out.data_ptr<float>();
    const float* ba_ptr = bc.data_ptr<float>();
    const int64_t maxRows = 65535;
    const int cols4 = (int)(N >> 2);
    for (int64_t r0 = 0; r0 < M; r0 += maxRows) {
        int64_t rem = M - r0;
        int rows = (int)(rem < maxRows ? rem : maxRows);
        float4* rowPtr = reinterpret_cast<float4*>(out_ptr +
                                                   (long long)r0 * N);
        if ((N & 15) == 0) {
            int quads = cols4 >> 2;
            dim3 grid((quads + threads - 1) / threads, rows);
            epilogue_vec4x4_kernel<<<grid, threads, 0, stream>>>(
                rowPtr, reinterpret_cast<const float4*>(ba_ptr), cols4);
        } else if ((N & 7) == 0) {
            int pairs = cols4 >> 1;
            dim3 grid((pairs + threads - 1) / threads, rows);
            epilogue_vec4x2_kernel<<<grid, threads, 0, stream>>>(
                rowPtr, reinterpret_cast<const float4*>(ba_ptr), cols4);
        } else {
            dim3 grid((int)((N + threads - 1) / threads), rows);
            epilogue_scalar_kernel<<<grid, threads, 0, stream>>>(
                out_ptr + (long long)r0 * N, ba_ptr, (int)N);
        }
    }
    return out;
}
"""

cpp_source = (
    "torch::Tensor fused_forward_cuda(torch::Tensor x, "
    "torch::Tensor w_half, torch::Tensor bias_add);"
)

fused_module = load_inline(
    name="fused_linear_fp16_swish_tanh_gelu_hardtanh_v5_lt",
    cpp_sources=cpp_source,
    cuda_sources=cuda_source,
    functions=["fused_forward_cuda"],
    verbose=False,
    extra_cuda_cflags=["-O3"],
    extra_ldflags=["-lcublas", "-lcublasLt"],
)


class ModelNew(nn.Module):
    def __init__(self, in_features, out_features, add_value_shape):
        super(ModelNew, self).__init__()
        self.matmul = nn.Linear(in_features, out_features)
        self.add_value = nn.Parameter(torch.randn(add_value_shape))
        self._fn = fused_module.fused_forward_cuda
        # Caches (plain attributes, not part of state_dict).
        self._cached_w_half = None
        self._cached_w_key = None
        self._cached_ba = None
        self._cached_ba_key = None

    def _fallback(self, x):
        x = F.linear(x, self.matmul.weight, self.matmul.bias)
        x = x + self.add_value
        x = torch.sigmoid(x) * x  # Swish
        x = torch.tanh(x)
        x = F.gelu(x)  # GELU
        x = F.hardtanh(x, min_val=-1, max_val=1)  # Hardtanh
        return x

    def forward(self, x):
        w = self.matmul.weight
        if (not x.is_cuda) or x.dtype != torch.float32 or x.dim() != 2:
            return self._fallback(x)
        N, K = w.shape[0], w.shape[1]
        if (K % 8) != 0 or (N % 8) != 0 or w.device != x.device:
            return self._fallback(x)

        w_key = (w._version, w.data_ptr())
        if self._cached_w_key != w_key:
            self._cached_w_half = w.detach().to(torch.float16).contiguous()
            self._cached_w_key = w_key

        b = self.matmul.bias
        av = self.add_value
        if b is None:
            ba_key = (None, av._version, av.data_ptr())
            if self._cached_ba_key != ba_key:
                self._cached_ba = av.detach().clone().contiguous()
                self._cached_ba_key = ba_key
        else:
            ba_key = (b._version, av._version, b.data_ptr())
            if self._cached_ba_key != ba_key:
                self._cached_ba = (b.detach() + av.detach()).contiguous()
                self._cached_ba_key = ba_key

        return self._fn(x, self._cached_w_half, self._cached_ba)
```

Write an improved complete ModelNew: fix any error, and if the solution is already correct, make it faster. Output the new code in one ```python codeblock. Just the model code, no other text, and NO testing code.
