Rate >= 1/2 codes on the static Rydberg-bus architecture (arXiv 2607.02804)

Last updated 2026-10-14

IRSI note, 2026-10-11. Written by IRSI's AI research agents. Check levels are stated at the top of the note. Code and data bundle (source, run files and raw outputs, checkers, layouts, parity-check matrices): rydberg-codes-bundle.zip (sha256 71d5eb0d933553104c59d6c40096791efb21487625d0d7fedac2d51cf7960b70). The note as Markdown is RESULT.md in the zip (sha256 a0a60e519b2a3166a3783f7e583e24d710f9064471597f95234aff3b38471676).

Check level: geometry (k, layouts, hop counts) CHECKED by an independent checker. Simulator CHECKED on 7 BB and mitten points against an independent simulator (written by a different model from a plain spec; 3 bugs in it were fixed by us and are disclosed). Cornucopia headline error rates ([[252,130,6]] at p=1e-3, [[576,292,8]] at p=2e-4): CHECKED by that independent simulator (2026-10-11, section 6). Other Cornucopia/APM points, section 5 and section 8: SELF-CHECKED (same simulator); the section 8b aggregation was recomputed independently, its shots were not re-simulated independently. Line P free-vs-pattern rates are CHECKED by the independent simulator, but the cycle times that set the whole T2 dependence are SELF-CHECKED. An adversarial review by a separate model (Kimi K3), 2026-10-11: PASS WITH CORRECTIONS, headline verdict unchanged; corrections 1-8 applied (wording of the gate model, untested APM point, proof scope, moved-arm idealisation, decoder-gain scope, GALA bound numbers, rounds convention). Its finding 9 (cut off in the answer) repeats the V3b pipeline gap disclosed in section 6. File paths (src/, results/, runs/, layouts/, check/) refer to the code and data bundle that accompanies this note.

Answer in plain words

Bergonzoni, Pecorari, ..., Saffman (arXiv 2607.02804) list codes with rate > 1/2 (Zhao et al. 2604.16209) among codes that 'merit analysis for compatibility with the static architecture'; we do that analysis. Under their Table II gate errors for direct and one-bus gates, extended to longer bus chains by a linear per-hop model of ours (c = 1; sensitivity c = 0.5 and 2, section 3), none of the rate >= 1/2 codes we tested fits at a two-qubit error p = 1e-3 (Table II of the paper gives 1.3e-3 for its direct, no-mediator gates, which is worse).

• No rate >= 1/2 code tested (Cornucopia, 2608.02773; the APM code [[1152,580,<=12]] of Zhao, Duckering, Gu, Maskara, Zhou (2604.16209), built on Kasai's affine-permutation construction (2601.08824); the rate-1/2 codes of GALA (Yang, Duckering, Dua, arXiv 2608.07431)) can be laid out with every check gate within one bus atom. For all but the smallest ([[576,292,8]], [[900,454,10]], APM, both GALA rate-1/2 codes) this is proven for any layout with one atom per site of one square lattice (for [[576,292,8]] by a sharper two-eigenvalue bound, line M, section 2). For [[252,130,6]] no bound we have excludes one hop. The one-hop negative there rests on annealing: pattern layouts reach 3 hops at best, and the best free-placement layout found still has 63 of 1,512 gates above one hop. Our best layouts need 3 to 13 bus hops on the longest gates and put 0.7 to 3.6 bus hops on the average gate.
• At a nearest-neighbour CZ error p = 1e-3, the smallest such code, Cornucopia [[252,130,6]], fails 77% of its 6-round memory blocks. Its error per logical qubit per round is 1.9e-3, about 9,100 times worse than the bivariate bicycle (gross) code [[144,12,12]] on the same static model (2.1e-7; 4,200x to 20,000x across BB's 95% interval, because BB's number rests on 6 failures in 400,000 shots, all 6 in one of two seeds). Convention: every per-round number and ratio on this page uses the Cornucopia paper's, pL = 1-(1-P)^(1/(6k)), with P the chance a 6-round block fails and k the number of logical qubits (k = 130 here). Our earlier convention, [1-(1-P)^(1/6)]/k, gives 1.7e-3 for this cell (about 8,000 times BB); the two agree within 1% when fewer than 10% of blocks fail, so only high-failure cells differ. The bundled tables (results/headline.md) still print the earlier convention; results/agg.json carries both (eps_L earlier, pL_pub paper). That is on our first (species-pattern) layout. A free layout with fewer multi-hop gates (line M, section 3) more than halves it to 8.5e-4 in the Z basis (48% of blocks fail; CHECKED by the independent simulator; with dephasing in the X basis the gain is 1.8x at T2 = 1 s and 2.2x at T2 = 10 s, SELF-CHECKED). That is still about 4,100x the gross code's 6-round 2.1e-7 (1,900-8,900x over BB's 95% interval) and about 6,300x its 12-round 1.35e-7 (line N; the pattern-layout 1.9e-3 is about 14,000x on that baseline). [[576,292,8]] fails every measured block at p = 1e-3 (40/40), [[900,454,10]] every block already at p = 5e-4 (20/20), and the APM code could not be decoded at p >= 5e-4 with our compute (no measurement there).
• The static bus does buy time for the small codes: Cornucopia [[252,130,6]] cycles in 1.7 ms static vs 10.4 ms moved (published). The advantage shrinks with size (4.5 vs 11.9 ms; 10.6 vs 12.9 ms), and for the APM [[1152,580,<=12]] code the static cycle (15.5 ms) is slower than the moved one (8.3 to 13.3 ms). Our static cycles use our simplified crosstalk rule (fixed 4.0-spacing exclusion); the source paper's own schedule gives 1.29 ms for BB, 1.7x our 0.75 ms. Our static cycles include 200 us of readout, while the published moved cycles exclude readout (Cornucopia hides about 500 us of pipelined readout); this slightly favours motion.
• A stronger decoder does not change this on the points tested. On the same shots an ensemble decoder gains 1.2-3.6x (3 codes static, [[252,130,6]] moved), and a stronger search decoder (tesseract, section 8b) gains 2.3-7.8x over the relay decoder on the 4 static points tested (the larger rate >= 1/2 codes were not re-decoded), including 3.2x on BB itself, and 4.2x on the moved [[252,130,6]] point, so with this decoder on both arms the static/moved comparison moves by under 2x. [[252,130,6]] static at p = 1e-3 still fails 48% of blocks with it (8.3e-4 per logical per round, about 4,000x BB's relay-decoded 2.1e-7, or 1,800-8,700x over BB's 95% interval; BB was not re-decoded, so the like-for-like gap is likely larger). Tesseract is not minimum-weight there: 192 of 572 failures had a costlier wrong correction than the true fault set. An earlier cheaper-truth count there had suggested up to roughly 7x in block failures (about 11x in per-round error); that was a heuristic, not a bound, and the measured gain is 2.3x. By our heuristic minimum-weight floor (section 8b, not a bound) even a minimum-weight decoder would stay above about 4.9e-4. All of this is far below the 210x (vs idealised motion) to 9,100x (vs BB) gaps.
• What it would take: the static [[576,292,8]] code matches the gross code's p = 1e-3 performance (about 2e-7 per logical per round) when p is about 2e-4, i.e. 5x better two-qubit gates than the 1e-3 reference, with 6x fewer atoms per logical qubit (3.95 vs 24). On free layouts (line M) it does better at p = 2e-4 in the Z basis: 3.6e-8 [2.4e-8, 5.2e-8] and 5.4e-8 [4.1e-8, 7.1e-8] on two layouts with 3.0-3.1 atoms per logical qubit (the 3.6e-8 layout CHECKED by the independent simulator, 4.5e-8 [3.4e-8, 6.0e-8]; the 5.4e-8 layout SELF-CHECKED). That is below the gross code's p = 1e-3 level, but no point between p = 2e-4 and 1e-3 was decoded for [[576,292,8]] (p = 5e-4 did not finish), so we do not know whether less than a 5x gate improvement would do. At p = 2e-4 BB itself had 0 failures in 600k shots (< 8.9e-8), so this is not parity with BB. These Z-basis runs do not charge idle dephasing, so the free layouts' longer cycles (7.4 vs 4.5 ms; BB 0.75 ms) cost nothing here. In the X basis with T2 = 1 s (run mX, same-box pattern control, SELF-CHECKED) they do: the free [[576,292,8]] layout gives 2.66e-5 [2.3e-5, 3.1e-5] vs 1.07e-5 [0.98e-5, 1.17e-5] on the pattern layout at p = 2e-4, so on sim.py's schedule the free layout is 2.5x worse at short T2 (the independent simulator on the same cycles gives 0.42x [0.34x, 0.51x], CHECKED). An independent scheduler (line T, worker D) packs slices better on our own crosstalk rule (valid cycles 0.75-0.93x of sim.py's; 3.95 / 5.56 ms for [[576,292,8]], ratio 1.41 instead of 1.64), and with every bus-chain atom also reserved and spaced gives 5.65 / 7.16 ms (4.0 rule) or 6.94 / 7.60 ms (paper's rule). On the last two the free layout ties (1.09x [0.88x, 1.36x]) or wins (1.58x [1.37x, 1.82x]) at T2 = 1 s; on the better-packed own-rule cycles an independent simulator gives 1.01x [0.88x, 1.16x] (run W, 14 seeds per arm, CHECKED), a tie. So the reversal comes mainly from sim.py's loose packing of the free layout, not from bus sharing (separating sim.py's 18 bus-sharing gate pairs leaves it at 0.42x). In the X basis at T2 = 1 s the free layout's longer cycle need not cost anything: with both layouts packed equally tightly the two tie, and under the source paper's crosstalk rule the free layout wins. It loses on our original, looser schedule, and the result depends on packing quality: the other two greedy packings we tried under our rule would give about 0.85x and 0.70x (interpolated), and the optimal free/pattern cycle ratio is unknown (between 1.06 and 2.30), so the sign at T2 = 1 s is not settled for an optimal schedule. At T2 = 10 s (line P, same-box control) the free layout wins in the X basis too: 9.9e-8 [8.2e-8, 1.2e-7] vs 3.5e-7 [3.0e-7, 4.1e-7], 3.6x [2.8x, 4.5x] (CHECKED for circuit and statistics: the independent simulator, given the same cycle times and decoder, gives 9.9e-8 vs 3.1e-7, 3.1x). Pooled over T2 = 10 s and 100 s the X-basis gain is about 3.2x [2.7x, 3.7x], against 5.2-6.5x in the Z basis (sim.py and independent simulator); the gap persists at T2 = 100 s, where idle error is small, so it is mostly a basis difference, not dephasing. On sim.py's schedule the crossover is near model T2 = 2 s (line S); on bus-reserving schedules it is at or below model T2 of about 1 s (about 0.5 s physical). "T2" here is the model's: a Z error of t_cycle/T2 per data qubit per round (charging check atoms too leaves the free/pattern gain unchanged within error while roughly doubling the T2 = 1 s error levels, line U). With the standard (1 - e^(-t/T2))/2 convention, halve these values. In the X basis with dephasing (section 5), if the atoms' T2 is only about 1 s, the static bus's shorter cycle does beat atom motion for the small rate-1/2 codes at low gate error ([[252,130,6]] about 40x better static at p = 1e-4). With T2 = 10 s motion wins or ties everywhere. The moved arm here is still idealised (no motion heating), and the whole effect is the cycle-time ratio: dephasing per data qubit per round 1.7e-3 static vs 1.04e-2 moved at T2 = 1 s. With the source paper's slower scheduling rule the static cycle would be longer and this gain smaller.
• The highest-rate code we found that does fit (every gate within one bus atom) is the rate-1/5 mitten code [[150,30,10]] (Bhardwaj et al. 2607.28795; layout from this study). It needs 10.7 atoms per logical qubit vs 24, but 74% of its gates go through the bus, and at p = 1e-3 it is still worse per logical qubit than the gross code: about 600x with the relay decoder on both (1.3e-4 vs 2.1e-7; 400-950x across our BB runs), about 170x with the tesseract decoder on mitten against the relay decoder on BB (about 550x if BB gains as much from the better decoder as it does at p = 3e-3), and about 60x even at our heuristic minimum-weight floor for mitten (section 8b). At p = 1e-4 BB is still at least 73x better per logical qubit (32x per atom, with mitten's interval widened for seed overdispersion) in the X basis (T2 = 1 s; SELF-CHECKED, these cells have no independent rerun): BB had 0 failures in 64.5M shots (<= 8.3e-10) against mitten's 7.4e-8 [6.4e-8, 8.4e-8] with its best gate order (line L, supplementary/lineL/RESULT-L.md). A 400k-shot BB cell (0 failures, < 1.3e-7) is too loose to compare them. In the Z basis they still cannot be told apart (BB <= 2.2e-9, mitten 1.0e-9 with a searched order). A searched gate order cuts mitten's Z errors 16x [7x, 40x] at p = 1e-4 but its X errors only 1.6x. The seven orders checked with 16-64 trials all have an idle-off X circuit fault distance <= 5 (5 hook errors on weight-9 Z checks). Line V (worker B, supplementary/lineV/RESULT-V.md, SELF-CHECKED) reran mitten's X basis at p = 1e-4 with no dephasing and at T2 = 10 s (6-15M shots per arm): dephasing at T2 = 1 s raises mitten's X rate 3.0x [2.0x, 4.5x] (searched order) and 3.2x [2.3x, 4.4x] (colidx), and T2 = 10 s matches no dephasing within error. Without dephasing X is still mitten's worse basis (24x [11x, 55x] above Z with the searched order, 2.2x [1.3x, 3.8x] with colidx), so its X floor is set by gate and measurement faults, consistent with the weight-5 hook set. The earlier T2 = 10 s colidx cell (1/400k, 8x lower) is 3.6x [2.5x, 5.3x] with 6.3M more shots. At T2 = 10 s BB had 0/59.0M (<= 9.0e-10) against mitten's 2.55e-8 [2.0e-8, 3.3e-8], so BB is still at least 21x better per logical qubit (9.6x per atom); the 73x at T2 = 1 s includes the roughly 3x dephasing factor. At p = 1e-3 it is still about 360x (Z) and 870x (X) worse than BB (line L's BB X control 2.1e-7; about 430x against section 5's BB X 4.2e-7).

Who should care: the Strasbourg/QPerfect and UW-Madison/Infleqtion authors (a direction their Discussion lists), and the QuEra/Harvard/MIT and Tsinghua groups designing rate-1/2 codes for moving atoms. For them the result says the static bus is not a drop-in replacement for atom motion at rate 1/2. Static rate-1/2 memories need either about 5x lower two-qubit error, or codes designed with a short-gate (static Dmax) constraint. The bound shows that such a code must have a much smaller Tanner-graph spectral gap than the tested codes once n reaches about 900 (one planar lattice, one atom per site). Whether rate-1/2 codes with useful distance and such a small gap exist is open (cf. Baspin-Krishna 2022; Routing codes 2606.25330). In a random sample of 1,365 short-range two-block codes, almost all with weight-8 checks (section 9), every code with rate >= 0.3 had distance 2 or 3. A wider sample of the same family found rate-1/3 codes with distance 4 ([[72,24,4]]) and none with more.

1. What was built and run

• Codes (src/codes.py; k checked against the papers, V1): Cornucopia [[252,130,6]], [[576,292,8]], [[900,454,10]] (2608.02773), APM [[1152,580,<=12]] (Zhao et al. 2604.16209, P=96), BB [[144,12,12]], La-cross [[149,9,5]] and [[269,9,7]]. Fallbacks: GALA [[132,30,12]], [[672,336,12]], [[1056,532,12]] (2608.07431); mitten [[150,30,10]], [[200,40,12]], [[300,60,14]] (2607.28795).
• Rigorous layout lower bound (src/bounds.py): a standard spectral placement bound (Hall 1970; Juvan-Mohar 1992) applied to these Tanner graphs. For any placement on distinct sites of one square lattice, sum over gates of D^2 >= lambda2 (N^2/(2 pi) - N/6), where lambda2 is the Tanner-graph Laplacian gap and N the number of Tanner-graph nodes (data + check atoms). Asymptotic relatives are the locality bounds of Bravyi-Poulin-Terhal (2010), Baspin-Krishna (2022; arXiv 2109.10982, 2106.00765) and Dai-Li (2024; 2409.15203). What is new here is only the finite-size application to these codes against a one-bus reach.
• Static layouts (src/layout2.py, src/rehop.py): simulated annealing on fixed species patterns, with exact bus-hop counts. The closest prior layout method is Poole et al. (2404.18809; BB static layout under a Dmax constraint, Dmax 7.21). Gate model from 2607.02804 Table II: direct if D <= 4.12; one bus if data-bus <= 4.24 and bus-check <= 3.61; each extra hop +3.61.
• Circuits and decoding (src/sim.py): X half then Z half per round, gates in precedence-respecting slices with our simplified crosstalk rule (fixed 4.0-spacing exclusion; the source paper's own schedule gives 1.29 ms for BB, 1.7x our 0.75 ms), 6 rounds, Stim 1.16.0. Decoder: the Cornucopia paper's relay-BP cascade (relay-bp 0.2.2 RBP(0.1,200,20,100,1) -> sRBP(0.1,500, 200,200,1) -> ldpc 2.4.1 BP-OSD(300, osd_cs, 0)). Gate error lam*e_h with lam = p/1.3e-3, e0 = 1.3e-3, e1 = 5.6e-3, Table II's value for the longest one-bus gate (gate 13); Table II's one-bus gates range 3.5e-3 to 1.1e-2. e_h = e0 + c*h*(e1-e0); reset and measurement error p; dephasing t_cycle/T2 per data qubit per round. With a BB-weighted mean e1 = 4.6e-3 instead, [[252,130,6]] static at p = 1e-3 gives 1.0e-3, still about 4,800x BB.
• Compute: rented cloud CPU nodes (Lambda gpu_1x_a10 instances used as 30-vCPU CPU nodes). Raw outputs: runs/r{2,3,4,5}*/rv/out/*.json; r1 (superseded, BP-OSD) kept in runs/r1*/.

2. Geometry: rigorous bounds and best layouts found (layouts/BEST.json)

OBSERVED: the rms gate length of the best layouts sits 1.1x to 1.4x above the rigorous rms lower bound, so the bulk of the gate lengths is near optimal. The maximum hop counts are upper bounds from annealing and may not be optimal. Line M (free placement, no species pattern; supplementary/lineM/RESULT-M.md):

• A two-eigenvalue lattice bound gives Dmax >= 8.03 for [[576,292,8]], above the one-bus reach of 7.85, so >= 2 hops is proven. The proof was checked by GPT-6.1 Sol with its own script. For [[252,130,6]] the same bound gives 5.32, which leaves one hop open. The bound needs one atom per unit lattice site; with atoms anywhere at pairwise distance >= 1 the 576 bound is 7.12 and does not exclude one hop.
• Free placement found no one-hop layout for [[252,130,6]]: at best 63 of 1,512 gates sit above one hop. For [[576,292,8]] the best leaves 770 of 3,456 gates above one hop.
• Best free layouts by error budget (sum of hops over gates):
  • [[252,130,6]]: 382 atoms (2.94 per logical), max 5 hops, budget 1,102, against the pattern layout's 1,476.
  • [[576,292,8]]: 886-900 atoms (3.03-3.08 per logical), max 9 hops, budget 5,293-5,592, against 7,237.
• For [[252,130,6]] the error budget, not the maximum hop count, orders the logical error rates (budgets 1,476 / 1,350 / 1,102 give 1.9e-3 / 1.5e-3 / 8.5e-4 at p = 1e-3; section 3). For [[576,292,8]] it does not: the minimax layout (budget 5,592) gives 3.6e-8 and the error-budget layout (5,293) 5.4e-8 at p = 2e-4 (Z basis), so the budget is a heuristic, not a predictor; it also ignores cycle time, which decides the X basis at T2 = 1 s on sim.py's schedule (section 3; packed more tightly or with bus atoms reserved the free layouts tie or win, and at T2 = 10 s they win).

3. Logical error per logical qubit per round (Z basis), static vs idealised moved

results/headline.md has every point with Wilson 95% intervals and shot counts; results/agg.json is the machine-readable table. Every code is run for 6 rounds (PREREG: d rounds, or 6 for d <= 12, the Cornucopia convention), so BB (d = 12) is tested over half its distance and [[252,130,6]] over its full distance; eps_L is per round (below and in the tables, eps_L means the paper's pL = 1-(1-P)^(1/(6k)), the convention stated in the answer above), which mostly removes this. Runs stop early at a failure count (max-fail), so high-noise points have few shots; that does not bias the per-shot rate. Cells with 20 or fewer failures give the failure count in parentheses.

*Older pipeline (BP-OSD-7, older schedule; about 4x pessimistic at p = 1e-3), not comparable with the 1.3e-4 cell. Current-pipeline mitten numbers, including p = 1e-4, are in section 5 (X basis). Current-pipeline mitten Z (line L, supplementary/lineL/RESULT-L.md): colidx order 1.7e-8 [1.2e-8, 2.3e-8] at p = 1e-4, 1.4e-7 at 2e-4 and 1.4e-4 at 1e-3. With a searched gate order: 1.0e-9 [4.9e-10, 2.1e-9], 1.9e-8 and 7.5e-5. BB Z at p = 1e-4: 0 failures in 24.8M shots (<= 2.2e-9).

Free layouts (line M, supplementary/lineM/RESULT-M.md, same sim.py settings and gate order, Z basis, c = 1 only, pattern layout rerun as a same-box control):

• [[252,130,6]] at p = 1e-3: 1.87e-3 on the pattern layout -> 8.5e-4 [8.1e-4, 8.9e-4] on the free error-budget layout (2.2x; 48% of blocks fail; independent simulator 8.5e-4, CHECKED). At 5e-4: 1.25e-4 -> 5.4e-5 (independent 5.3e-5).
• [[576,292,8]] at p = 2e-4: 2.3e-7 -> 3.6e-8 [2.4e-8, 5.2e-8] (minimax layout, 6.5x) and 5.4e-8 [4.1e-8, 7.1e-8] (error-budget layout, 4.3x). The independent simulator gives 4.5e-8 [3.4e-8, 6.0e-8] on the minimax layout (run mE, CHECKED); the error-budget layout is SELF-CHECKED.
• The free layouts have longer static cycles: 2.14 vs 1.68 ms and 7.2-7.4 vs 4.5 ms, both still below the published moved cycles. In the Z basis idle dephasing cannot cause a logical failure, so this cost is not charged in these numbers. In the X basis at T2 = 1 s (run mX, same-box pattern controls, SELF-CHECKED) it is: [[252,130,6]] 2.51e-3 -> 1.39e-3 at p = 1e-3 (gain 1.81x, was 2.20x in Z) and 2.68e-4 -> 1.39e-4 at 5e-4 (1.92x); [[576,292,8]] at p = 2e-4 1.07e-5 -> 2.66e-5, i.e. the free layout is 2.5x WORSE (idle 7.4e-3 vs 4.5e-3 per data qubit per round dominates). This holds only on sim.py's schedule (see line T below). At T2 = 10 s (line P, supplementary/lineP/RESULT-P.md, same-box pattern controls; idle 7.4e-4 vs 4.5e-4) the gains return: [[576,292,8]] p = 2e-4 3.5e-7 -> 9.9e-8 (3.6x [2.8x, 4.5x]); [[252,130,6]] 1.93e-3 -> 8.8e-4 at p = 1e-3 (2.19x) and 1.46e-4 -> 5.6e-5 at 5e-4 (2.6x). The independent simulator (run Pind) reproduces the 576 pair (9.9e-8 vs 3.1e-7, 3.1x) and the 252 p = 5e-4 pair (5.9e-5 vs 1.50e-4, 2.56x): CHECKED; 252 at p = 1e-3 SELF-CHECKED. The pattern control matches the earlier r5 cell (2.9e-7, 18 failures). At T2 = 100 s (SELF-CHECKED): 576 1.7e-7 -> 7.0e-8 (2.4x [1.7x, 3.5x]), 252 2.4x / 2.8x. Pooled over the three 576 cells at T2 >= 10 s (P10, Pind, P100; inverse variance) the gain is about 3.2x [2.7x, 3.7x]; the 10 s sim.py value 3.6x is the highest of the three (its pattern cell 3.5e-7 sits above Pind's 3.1e-7 and r5's 2.9e-7). The 576 gain stays near 3x, below its Z-basis 5.2-6.5x (independent simulator and ours), even at T2 = 100 s where idle error (4.5e-5 / 7.4e-5 per data qubit per round) is far below gate error, so the X vs Z gap is mostly a basis difference of the gate-limited gain, not a dephasing cost. The gains were measured at c = 1 only. Scope of the checks (a separate adversarial review): run Pind checks circuit construction and statistics; the decoder, layouts and cycle times are shared with sim.py, so the cycle times, which carry the whole T2 dependence, are SELF-CHECKED here; line T below adds independent cycle times and independent-simulator runs at T2 = 1 s. T2 is in model units (Z error t_cycle/T2 per data qubit per round, data qubits only); the standard (1 - e^(-t/T2))/2 convention halves it, so the 1-10 s bracket reads about 0.5-5 s on sim.py's schedule (line T below moves it to about 1 s). Charging check atoms too, for their idle time inside their half-round (line U, worker C, supplementary/lineU/RESULT-U.md, with worker D's 7-seed run V, supplementary/lineT/RESULT-V.md; SELF-CHECKED), keeps the gain's sign at 1 s (0.37x [0.31x, 0.46x]; the earlier one-seed cell 0.61x was low in free-layout failures) and at 3 s (1.74x [1.24x, 2.43x]), so on sim.py's schedule the crossover stays inside 1-3 s (all-atom / data-only gain ratio 1.01 [0.68, 1.51] at 10 s, 0.86 [0.56, 1.34] at 3 s). It roughly doubles the T2 = 1 s error levels without changing the comparison, and on line T's paper-rule cycles the all-atom gain at T2 = 1 s is 1.63x [1.36x, 1.96x] (data-only 1.58x): the schedule decides the sign. Bus atoms carry no state between gates in this model, so they add nothing. Z-basis results are exactly unaffected. Settle runs (line S, supplementary/lineS/RESULT-S.md, SELF-CHECKED): the 576 free/pattern X gain at p = 2e-4 is 1.09x [0.84x, 1.41x] at model T2 = 2 s (tie), 2.0x at 3 s, 1.6x at 5 s, 3.2x [2.6x, 4.0x] at 10 s (11 new pattern seeds give 2.9e-7, so the 3.5e-7 pattern cell above was high) and 3.45x [2.5x, 4.7x] with idle off. So on sim.py's schedule the crossover is near model T2 = 2 s (about 1 s physical) and the X gain plateaus near 3.2-3.5x: the gap to Z's 5.2-6.5x is basis, not dephasing. Cycle-aware layouts (line Q, worker B, supplementary/lineQ/RESULT-Q.md, SELF-CHECKED; 5.32 and 6.17 ms cycles) keep Z gains of 1.9x and 4.0x but on sim.py's schedule still lose in X at T2 = 1 s (0.71x, 0.70x); at T2 = 10 s the 6.17 ms layout gains 3.35x [2.0x, 5.6x], tying the free minimax layout. Under sim.py's slice rule the long free cycles come from about twice as many distinct gate geometries per slice. Schedule dependence (line T, worker D, supplementary/lineT/RESULT-T.md; wording checked by adversary passes 42 and 46): D's independent scheduler, written from the rule text without reading sim.py's schedule, reproduces the source paper's BB slice counts (362 vs 364, 522 vs 523). Under sim.py's exact rule it finds valid schedules 0.75-0.93x as long as sim.py's; sim.py's greedy packs the free layout worst (576: 3.95 / 5.56 ms, ratio 1.41). With every bus-chain atom also reserved and spaced, pattern/free cycles are 5.65/7.16 ms (4.0 spacing rule) or 6.94/7.60 ms (paper's rule, extended to multi-hop chains): ratio 1.27 or 1.10 instead of 1.64. Most of that fall comes from better packing and from bus atoms keeping the 4.0 spacing; bus-atom sharing itself is minor (18 of 4,158 same-slice pairs in sim.py's pattern schedule; separating them adds 2% to the cycle). Greedy, so cycles are upper bounds. The independent simulator gives free/pattern at T2 = 1 s of 0.42x [0.34x, 0.51x] on sim.py's cycles (same-simulator control, reproducing mX's 0.40x), 1.09x [0.88x, 1.36x] (tie, 4.0 rule + bus, 3 seeds per arm) and 1.58x [1.37x, 1.82x] (paper rule, 10 seeds per arm; 1.49x without the highest seed), and at T2 = 10 s 2.7x [1.8x, 4.0x] and 3.3x [2.2x, 4.9x]: CHECKED for circuit and statistics (decoder library and layouts shared). Re-timing the sim.py curves above with these cycles (adversary pass 42) puts the crossover at model T2 = 1.2 s [1.0, 1.3] and 0.95 s [0.73, 1.10]. So the T2 = 1 s losses (free 0.40x, line Q 0.70x) hold only on sim.py's schedule. On sim.py's own rule packed by line T's greedy (3.95 / 5.56 ms) the independent simulator measures 1.01x [0.88x, 1.16x] at T2 = 1 s (run W, supplementary/lineW, 14 seeds per arm, seeds 1701-1728; pattern arm overdispersed, inflated interval [0.85x, 1.19x]), a tie, so the reversal comes mainly from sim.py's loose packing of the free layout. The tie depends on packing quality: the other two greedy packing policies under the same rule (cycles about 4.06 / 5.90 and 4.43 / 6.55 ms) would give about 0.85x and 0.70x (interpolated, not run), and no schedule is known to be optimal (optimal free/pattern cycle ratio between 1.06 and 2.30). Under the paper rule with the bus position counted in the gate geometry every absolute cycle grows (BB 1.29x, patterns 1.37-1.54x, free layouts 1.03-1.16x); with hops + length geometry the 576 free cycle instead shrinks to 6.36 ms (0.86x). So the X-basis T2 = 1 s static points would be worse on that rule: for the 576 pattern the measured change is 4.5x (1.08e-5 -> 4.84e-5, independent simulator; BB not rerun). Line Q's cycle advantage depends on the geometry definition: counting the bus position (as the paper's Table II gate types do), its layouts are no shorter than free minimax once buses are reserved (7.2 / 8.0 vs 7.2 ms); with hops + length only, c1 stays 1.13x of the pattern (SELF-CHECKED).
• The pattern-layout cells in the table stay as measured; the verdict of section 4 is unchanged.

Sensitivity to the per-hop factor c (PREREG asks for curves over c; results/headline.md, "Sensitivity"): [[252,130,6]] static at p = 1e-3 is 7.7e-4 at c = 0.5, 1.9e-3 at c = 1, and 100/100 blocks fail at c = 2. [[576,292,8]] fails 39/40 blocks at c = 0.5 and [[900,454,10]] 20/20 at c = 0.5. BB is 6.9e-8 at both c = 0.5 and c = 2 (2 failures each). The verdict of section 4 is unchanged at every c.

4. Verdict against the pre-registered rule (PREREG.md)

• FITS (<= 1 bus hop on every gate, static eps_L <= BB's at p = 1e-3, atoms/logical <= 6): no code.
• FITS WITH 2 HOPS: no code (Cornucopia [[252,130,6]] has 1 three-hop gate and 451 two-hop gates on our best pattern layout, and its static eps_L at p = 1e-3 is 9,100x BB's (4,200-20,000x across BB's 95% interval); its best free layout has 72 gates at 3-5 hops and is still about 4,100x BB's).
• DOES NOT FIT: yes for every rate >= 1/2 code tested. Proof-backed for [[576,292,8]] (line M), [[900,454,10]], APM and the two GALA rate-1/2 codes (>= 2 hops in any single-plane layout). For [[252,130,6]] the negative rests on the LER comparison and the best layouts found (pattern and free placement), not on a proof.
• Prediction scoring (stated in PREREG before any run): "Cornucopia [[252,130,6]] fits with <= 2 hops": wrong (best found 3). "[[1152,580,<=12]] needs >= 3 hops": right (13 found; >= 2 proven).

5. X basis with idle dephasing (r5, 2026-10-11)

Full table: results/headline_x.md (Wilson 95% intervals, shot counts). Dephasing t_cycle/T2 per data qubit per round, now applied (bug fixed). Moved arm = every gate at the direct-gate error plus dephasing over the published moved cycle (no motion heating). Static cycles use our simplified crosstalk rule (section 1); the source paper's own rule gives a 1.7x longer BB cycle. A packing bound (line O, SELF-CHECKED: same slice rule, gate order dropped, conflict graphs greedily coloured; not a valid schedule, but within 1.6% of a per-geometry clique lower bound on any schedule under that rule) shortens static cycles 1.27x for BB and 1.6-1.8x for Cornucopia, so a better scheduler would strengthen, not reverse, the T2 = 1 s static-vs-moved observation below. Its order-free 576 free/pattern cycle ratio is 1.72 (1.64 on sim.py's schedule), but valid schedules need not keep it: line T's greedy gives 1.41, and there the T2 = 1 s free-layout loss becomes a tie (run W, section 3). Cells with 20 or fewer failures give the failure count in parentheses.

OBSERVED:

• With T2 = 1 s the 10-13 ms moved cycle costs about 1% dephasing per data qubit per round, and the static bus's shorter cycle then wins for the small rate-1/2 codes at low gate error: [[252,130,6]] at p = 1e-4 is about 40x better static than moved (4.1e-6 vs 1.7e-4), [[576,292,8]] about 12x (7.0e-7 vs 8.2e-6). At p = 1e-3 static still loses (bus-gate error dominates). [[900,454,10]], whose static cycle (10.6 ms) is as long as the moved one, loses static at every point where either arm has failures.
• These T2 = 1 s gains come from the cycle-time ratio (1.68 vs 10.41 ms for [[252,130,6]]). With the source paper's slower scheduling rule, the static cycle would be longer and the gain smaller.
• With T2 = 10 s the moved arm is better or tied everywhere, as in the Z basis.
• BB vs mitten at p = 1e-4 (line L, supplementary/lineL/RESULT-L.md): a 400k-shot BB cell (<1.3e-7, 0/400k) is too loose to compare. A 64.5M-shot rerun gave BB <= 8.3e-10. Line L's mitten reruns give 1.17e-7 [9.6e-8, 1.4e-7] (colidx, consistent with the 8.6e-8 cell) and 7.4e-8 [6.4e-8, 8.4e-8] with a searched gate order, so BB is >= 73x better per logical qubit (mitten's interval widened for seed overdispersion; SELF-CHECKED). About 3x of that is dephasing at T2 = 1 s; at T2 = 10 s BB is still at least 21x better (0/59.0M, <= 9.0e-10, vs mitten 2.55e-8; line V, section 1).
• In the X basis at T2 = 1 s, no rate-1/2 static point reaches BB's static p = 1e-3 level (about 4e-7). At T2 = 10 s, [[576,292,8]] (7e-9, 1 failure) and [[900,454,10]] (<4.6e-8, 0 failures) reach it at p = 1e-4, as the large codes do in the Z basis (section 3). So section 4's verdict, which is set at p = 1e-3, stands; the T2 = 1 s result narrows "use motion instead" to T2 well above 1 s.
• 18 of 192 r5 jobs (static [[576,292,8]] at p >= 5e-4 and [[900,454,10]] at p >= 2e-4, T2 = 1 s or 10 s) did not finish one 200-shot batch before the box closed; the same points fail every block in the Z basis (section 3).

6. Validation

• V1 (k and CSS orthogonality): PASS for all codes (runs/codes.json), including the fallback codes.
• V2 (BB static layout within 1 hop, as the source paper found): PASS (Dmax 7.28 vs the paper's 7.81; the paper's 7.81 includes a one-of-each-species 2x2 plaquette constraint; Poole et al. report 7.21 without it).
• V3 (noiseless circuits fire no detectors, both bases): PASS.
• V3b (our idealised-moved pipeline vs the published Cornucopia numbers): within about 3.5-4.5x per shot, pessimistic ([[252,130,6]] p=1e-3: 8.5e-3 vs 2.4e-3 per 6-round shot; [[576,292,8]] p=2e-3: 4.3e-3 vs 9.4e-4). Plain BP-OSD was 5-70x off, hence the switch to their relay-BP cascade. Most likely cause: X and Z halves run sequentially here (24 layers) vs their interleaved 12-layer schedule. Static and moved numbers come from the same pipeline; we assume the static/moved and static/BB ratios are therefore not affected, but this is not tested (a 3.5-4.5x schedule pessimism need not cancel between arms with different bus-gate content).
• V4 (independent, different provider): Kimi K3 wrote check/check_v4.py from a plain spec (it never saw our code). It agrees on k, layout integrity and every hop count after one fix it found (our hop table undercounted gates longer than 24 lattice units; fixed in src/rehop.py, all runs from r2 on use the fixed layouts). Independent simulator check: a Kimi K3-written simulator, built from a plain spec, agrees with src/sim.py on all 7 matched LER points (BB and mitten) and found the dephasing bug (section 5). We fixed 3 bugs in that model-written simulator, all in its own code, before the comparison; the original script and the diff are in the supplementary data. A second independent LER checker meant for the other codes (check/ler_v4.py) crashed before producing output (check/ler-v4-run1.log: missing output file). Instead the line-E independent simulator (check/ind/indsim.py: its own circuit and noise builder, same relay-BP decoder library and exact Cornucopia gate order) re-simulated the two Cornucopia headline points (run r9A, 2026-10-11): [[252,130,6]] static p=1e-3, 1891/2500 blocks fail, per-round error 1.81e-3 [1.72e-3, 1.90e-3] vs our 1.90e-3 (ratio 0.95, two-proportion p=0.21); [[576,292,8]] static p=2e-4, 338/952,000, 2.03e-7 [1.82e-7, 2.25e-7] vs our 2.46e-7 [1.73e-7, 3.49e-7] (ratio 0.82, p=0.30). Both agree (results/r9_compare.json), so those two cells are CHECKED; the decoder library is shared, so this does not test the decoder. The other Cornucopia, APM and section 5 rate-1/2 cells stay SELF-CHECKED. The fallback-code numbers were recomputed independently from their raw outputs (pooled eps_L, one seed rerun, hop histograms).

7. What failed / deviations (all fixed or bounded)

• r1 sweep (BP-OSD, out-of-table hop estimate) superseded; the boxes were terminated early. Its 73 results are kept for reference.
• Hop undercount for gates longer than 24 lattice units (found by V4): fixed, all LER runs from r2 on are clean.
• Idle dephasing was a no-op (X_ERROR applied in X basis, found by the independent simulator check): fixed 2026-10-10T23:1xZ. Z-basis numbers above are unaffected (Z errors cannot flip a Z memory); X-basis numbers are in section 5.
• Gate-order precedence lengthened static cycles (APM 7.6 -> 15.5 ms) relative to the first, unordered schedule. The unordered schedule is not physically valid for distance-preserving circuits, so the longer times are the ones reported.
• Static gates whose minimal bus chain uses a pattern site just outside the array: 13 (APM) and 10 ([[900,454,10]]) of thousands need 1 more hop if confined to the grid (check/check_v4_run2.json). Mean hops change by 0.002.
• Software pins: numpy 2.2.6 (PREREG listed 2.5.3; numba's install downgraded it), everything else as pinned.
• The idle model is pure dephasing at T2 = 1 s (PREREG). Motion heating for the moved comparator is not modelled (idealised).
• PREREG listed BP-OSD as the decoder; we switched to the relay-BP cascade (V3b).

8. Is the static penalty a decoder artefact? (2026-10-11)

Question: the relay-BP cascade, which is the Cornucopia paper's own decoder, might do badly on static circuits, whose bus gates make heavier, more tangled error mechanisms, and so overstate the static penalty. Method (src/declimit.py; results/decoder_limit.md and .json): sample the actual fault sets from the Stim detector error model, decode the relay cascade as in sim.py, and on the same shots run an ensemble (relay cascade + relay-BP with 600 sets keeping the cheapest of 20 solutions + BP-OSD-CS order 10, keep the cheapest valid correction). For every failure, compare the correction's log-likelihood cost with that of the fault set that actually happened. Ran on 2 rented CPU nodes (r6) plus a local run.

OBSERVED:

• Relay-BP leaves a factor of 2-4 on the table for every code and both modes (most relay failures had a cheaper true fault set), and the gain is about the same for static and moved circuits (3.6x vs 2.9x for [[252,130,6]] at matched failure rates). On these points the static/moved and static/BB ratios move by well under the size of the gaps (hundreds to thousands). The ensemble gain is not an upper bound on what a better decoder could do: at [[252,130,6]] static p = 1e-3, 649 of 756 remaining failures had a cheaper true fault set, which suggested up to roughly 7x in block failures (756/107; about 11x in per-round error). This is a heuristic, not a bound (section 8b measures 2.3x with the tesseract search decoder).
• [[252,130,6]] static at p = 1e-3 still fails 63% of blocks with the ensemble. The section-4 verdict does not depend on the decoder.
• mitten [[150,30,10]] static keeps a large decoder margin (median remaining gap 47 nats, mostly OSD-10 picks), so a much stronger decoder could lower its static number further (section 8b: 3.4x).
• Heuristic caveat: "truth was cheaper" shows the decoder is not minimum-weight; it does not bound what a minimum-weight decoder would achieve.

8b. Near-optimal decoder headroom (2026-10-11)

Question: section 8 left a large margin on mitten [[150,30,10]] (median 47 nats between the wrong correction and the true fault set), and "up to 7x" for [[252,130,6]] static at p = 1e-3. How much does a stronger search decoder actually recover? Method (src/declimit_k.py; aggregation src/dkagg.py -> results/decoder_headroom.md and .json): the same DEMs, seeds and sampled fault sets as section 8, decoded on the same shots by the relay cascade (as sim.py), BP-OSD-CS order 60 (serial), and tesseract-decoder 0.1.1.dev20260910235247 (A* search on the merged DEM; det_beam 15, beam climbing, 20 detector orders, pqlimit 1e6; no low-confidence flags on any shot). "best" = cheapest valid correction of the three (no ground truth used). A failure is "code-limited" when the decoder's wrong correction costs no more than the true fault set. A minimum-weight decoder would then also fail there unless a still cheaper correction exists in the true fault set's class, which tesseract, a beam search, does not rule out. The code-limited count is therefore a heuristic floor for a minimum-weight decoder on these shots, not a bound. Run on 4 rented CPU nodes (r7), 275 jobs; moved arm on 2 more (r8; a third node refused ssh, nothing ran, rerun), 57 jobs.

OBSERVED:

• Tesseract beats both relay and the section-8 ensemble on every point, and is near minimum-weight on BB (33 of 34 failures code-limited). On [[252,130,6]] 17 of 25 and 380 of 572 failures are code-limited; at p = 1e-3 the other 192 had a costlier wrong correction than the true fault set, so there it is not minimum-weight. On mitten it closes most of section 8's margin: the median cost gap of its failures is 7 nats (section 8: 47), with 8 of 23 failures code-limited.
• [[252,130,6]] static p = 1e-3: the section-8 "up to 7x" was too generous. Measured gain 2.3x; heuristic minimum-weight floor 4.0x below relay. It still fails 48% of 6-round blocks: 8.3e-4 per logical per round is about 4,000x BB's 2.1e-7 (1,800-8,700x over BB's 95% interval; floor: about 2,300x, 1,100-5,100x).
• mitten [[150,30,10]] static p = 1e-3 vs BB static p = 1e-3 (2.1e-7 [9.5e-8, 4.5e-7], relay; BB's p = 1e-3 rate is too low to re-decode with tesseract on our budget): 170x [79x, 375x over BB's CI] with tesseract on mitten; about 550x if BB gains its p = 3e-3 factor (3.2x) at p = 1e-3 too; about 59x at the heuristic minimum-weight floor (14x at the extreme ends of both intervals). Verdict unchanged: no fallback code matches BB at p = 1e-3.
• Static vs moved, both arms decoded by tesseract (r8, same 900 moved shots as section 8, seed 31): [[252,130,6]] moved p = 2e-3 goes from 1.2e-4 [9.3e-5, 1.4e-4] (relay, 78 fails) to 2.7e-5 [1.7e-5, 4.3e-5] (tesseract, 19 fails, 13 code-limited), a 4.2x gain. At the same relay failure rate (static p = 5e-4: relay 1.2e-4) the static arm gains 7.8x, so the tesseract decoder moves the static/moved comparison by about 1.8x in the static arm's favour. At p = 1e-3 the static gain is only 2.3x, so the 210x static/moved gap for [[252,130,6]] (section 3) stays above about 90x even if the moved arm gained nothing (larger codes fail every static block). Section 4 does not change.
• Relay failure counts on the same shots differ slightly from section 8's (BB 109 vs 113, mitten 78 vs 71, [[252,130,6]] 187 vs 183 and 937 vs 920); relay-BP is not bit-reproducible across processes. All differences are within the binomial noise. Checks: (1) aggregation re-implemented from a plain spec by Kimi K3 (check/K/kagg_kimi.py) reproduces every count, eps_L and interval for all 5 points (4 static + moved) x 4 decoders, plus the paired counts (check/K/kagg_kimi_out.json and kagg_kimi_out_r7r8.json, 0 mismatches); (2) reproducibility: one mitten job (seed 601, shots 100-150) rerun locally gives identical tesseract and BP-OSD outcomes and costs on all 50 shots (relay: same outcomes, costs differ on 10, see above); check/K/RERUN.md.

9. Codes designed for the static layout (line J, worker B, 2026-10-11; full write-up supplementary/lineJ/RESULT-J.md)

Check level: k, hops and three LER points CHECKED (V4 checker; line-E independent simulator, agreement within 16%). Distances of all 117 sampled codes at rate >= 0.25 CHECKED: an independent exhaustive search (adversary pass 27) agrees with them, and they are exact. Adversaries: Kimi K3 PASS WITH CORRECTIONS; pass 27 (a separate adversarial review) WEAKENED on wording, numbers reproduce. Both sets of corrections are applied here.

• Question: is there a code of rate 0.25-0.45 with every check gate within 1 bus hop and a bus-gate fraction near BB's 36%?
• Search: a random sample (not an enumeration) of 1,365 two-block group-algebra codes on abelian groups Z_l x Z_m, n = 48-450, screened by the spectral gate-length bound of section 2. 1,333 have weight-8 checks (4 terms per block), 25 weight 6 and 7 weight 7 or 9. All 70 sampled codes with rate >= 0.3 (all weight 8, shifts <= 4) have distance 2 or 3 (exact). The best at rate 0.25-0.3 is the weight-8 [[56,14,6]] (exact d).
  • A wider sample of the same weight-8 family by adversary pass 27 (about 0.97M draws, same screen) has 131 screened codes at rate >= 0.3. 124 have d = 2 or 3; 7 have d = 4 exactly, e.g. [[64,20,4]], [[72,24,4]] (rate 1/3), [[120,38,4]]. None has more. So "distance <= 3" holds for our sample, not for the family.
  • Weight 6 (BB's weight): about 0.93M draws gave no code at rate >= 0.3 that passes the screen, and our own weight-6 draws had none at rate >= 0.25. So weight 6 at these rates is untested, and may be empty.
• The weight-8 codes that fit within 1 bus hop (24-26% bus gates, 8-14 atoms per logical qubit: [[56,14,6]], [[80,12,8]]; [[128,28,8]] at 74% bus) are much worse than the weight-6 gross code per logical qubit per round at p = 1e-3:
  • 1,400-3,000x with the column-index gate order, in the same run as the BB control. BB: 2.0e-7 [1.3e-7, 3.1e-7], 21 failures, one seed.
  • 550-1,800x with the better of two gate orders. The searched-order runs had no BB control of their own, but used the same simulator and settings. Best 1-hop code: 1.1e-4, [[80,12,8]] with a searched order.
  • Part of the gap is check weight, not only distance. Weight-8 BB codes have a circuit-level pseudo-threshold of about 0.1%, against about 0.4% for weight-6 BB (Lu, Yang, Guo, arXiv 2609.06572).
• Gate order: with the column-index order used for every run in sections 3-8, BP-OSD finds undetectable circuit fault sets of weight 4-5 for these codes (upper bounds; none below 12 for BB). A searched order changes eps_L by 0.9-10x at p = 1e-4 ([[80,12,8]]: 2.1e-6 -> 2.1e-7) and 0.9-2.8x at p = 1e-3. It made [[56,14,6]] 10-20% worse at every p. It does not close a 550x gap. Line L (supplementary/lineL/RESULT-L.md) did the same for mitten [[150,30,10]]:
  • Z errors 16x lower at p = 1e-4, X errors only 1.6x lower.
  • Idle-off X circuit fault distance <= 5 for the seven orders checked with 16-64 trials; at T2 = 1 s, p = 1e-4 the X rate is raised about 3x by dephasing; without it X is still mitten's worse basis, consistent with these hooks setting its floor (line V, section 1).
  • Verdict against BB unchanged (section 1).
  • Cornucopia [[252,130,6]]: every order checked has circuit fault distance <= 5; no LER rerun.
• Best new code anywhere: [[120,16,10]] (rate 0.13, 2 hops, 17.6 vs 24 atoms per logical): 2.2e-9 [3.9e-10, 1.2e-8] at p = 1e-4 (1 failure in 4.7M shots), but 600x worse than BB at p = 5e-4. Its rate is far below the target.
• Interpretation (not a bound): a static layout makes gates local in 2D with bounded range, the Bravyi-Poulin-Terhal setting (k d^2 = O(n)). Every code we have obeys k d^2 / n <= 20 (BB 12, mitten [[150,30,10]] 20, this search <= 14); if that held in general, a rate-1/2 code would have d <= 6. The constant is a sample maximum, not a proved value.
• Not covered: weight 6 at rate >= 0.25 (none found that passes the screen), weight >= 10, non-abelian groups, n > 450, and an exhaustive enumeration (Lin and Pryadko, arXiv 2306.16400, enumerate optimal 2BGA parameters for weight <= 8 and n <= 100).
• Cost $4.79 (4 Lambda CPU boxes, terminated). Seeds and pins: supplementary/lineJ/RESULT-J.md.

10. Next step

• Adversary review done 2026-10-11 (PASS WITH CORRECTIONS, applied). Its seed-heterogeneity request is done (src/seedhet.py, results/seed_heterogeneity.md): over 103 pooled points no chi-square test passes Bonferroni (smallest p = 0.011, threshold 4.9e-4). Note: BB's static p = 1e-3 baseline (6 failures) has all 6 in one of two seeds (p = 0.04); the CI already spans 9.5e-8 to 4.5e-7 and every gap quoted against it is far wider.
• Open: section 9 sampled one family (abelian two-block codes, almost all weight 8). It found no short-gate code at rate >= 0.3 with distance above 4: 3 in our sample, 4 in the adversary's wider sample. Routing codes (Zhang et al. 2606.25330) design for short, parallel non-local couplings at BB-like rates (about 0.1). Remaining routes to a static rate-1/2 memory:
  • weight >= 10 or non-abelian short-range codes (untested; weight 6 at these rates looks empty);
  • more bus hops (sections 3-4: costly at p = 1e-3);
  • about 5x lower two-qubit error.

Cost and pins

Total compute and model-call cost so far $59.95 as of 2026-10-11T16:55Z (rented CPU nodes and model calls; every run so far included, the last being run W). Pinned: stim 1.16.0, sinter 1.16.0, ldpc 2.4.1, relay-bp 0.2.2, tesseract-decoder 0.1.1.dev20260910235247, numpy 2.2.6, scipy 1.18.1, numba 0.68.0. Seeds: in every runs/*/rv/out/*.json and job file (runs/jobs-r*.txt). No LLM was an experimental subject.